Photovoltaic power generation is one of the most promising renewable energy technologies. In grid-connected photovoltaic systems, the use of traditional isolation transformers guarantees galvanic isolation, but it also increases the volume, cost, and power losses of the whole installation. For this reason, transformerless photovoltaic systems have become an active research area. In particular, transformerless solar inverters offer higher efficiency and lower cost, but they suffer from the common mode current problem. The rapidly varying common mode voltage across the parasitic capacitance between the photovoltaic panels and ground produces a common mode current, which may lead to electromagnetic interference, grid current distortion, and even safety hazards. Therefore, the suppression of common mode current is one of the most important technical challenges in transformerless solar inverters.
Single-phase transformerless photovoltaic inverters have been widely studied. However, the connection of a large number of single-phase units can cause unbalanced voltages in the three-phase utility grid. Standard VDE-AR-N 4105 therefore restricts the maximum single-phase injected power to 4.6 kVA. Three-phase transformerless solar inverters, on the other hand, do not introduce grid voltage unbalance and are able to handle higher power levels. Consequently, they are attractive for larger photovoltaic plants. Among the available converter topologies, multi-level inverters are particularly suitable for medium- and high-power applications. The flying capacitor clamped multi-level inverter offers a good balance between component count and complexity: it requires only half the number of clamping devices compared with the diode-clamped solution, and it does not need multiple isolated DC sources as in cascaded topologies. In this paper, we focus on a three-phase three-level flying capacitor inverter for transformerless solar inverter systems. We investigate the common mode behavior, analyze conventional carrier modulation methods, and propose a new modulation technique that maintains a constant common mode voltage, thus effectively suppressing the common mode current.
1 System and Common Mode Model
The system under study is a three-phase three-level flying capacitor multi-level inverter connected to the grid through three filter inductors. The DC bus is supplied directly from photovoltaic panels, and the parasitic capacitance between the photovoltaic terminals and ground is denoted as Cpv. The inverter phase legs are composed of four active switches and one flying capacitor per phase. The topology provides three distinct output phase voltage levels: Vd, Vd/2 and 0, where Vd is the DC bus voltage.
In order to analyze the common mode current, we first derive a common mode model. Let VaN, VbN and VcN be the output phase voltages with respect to the negative DC bus N. The common mode voltage of the three-phase system is defined as
$$
V_{CM} = \frac{V_{aN} + V_{bN} + V_{cN}}{3}. \tag{1}
$$
The common mode current is caused by the time variation of VCM across the parasitic capacitance Cpv:
$$
i_{CM} = C_{pv}\frac{dV_{CM}}{dt}. \tag{2}
$$
Therefore, the common mode current can be effectively eliminated if the common mode voltage is kept constant. The phase voltage of a flying capacitor phase leg can be described by a switching state variable. For each phase x (x = a, b, c), the phase voltage is given by
$$
V_{xN} = \begin{cases}
V_d, & \text{state 2: } S_{1x}, S_{2x} \text{ ON}, S_{3x}, S_{4x} \text{ OFF}, \\
V_d/2, & \text{state 1: } S_{2x}, S_{4x} \text{ ON}, S_{1x}, S_{3x} \text{ OFF}, \\
0, & \text{state 0: } S_{3x}, S_{4x} \text{ ON}, S_{1x}, S_{2x} \text{ OFF}.
\end{cases} \tag{3}
$$
Here, S1x and S3x are complementary, and S2x and S4x are complementary. Combining (1) and (3), the common mode voltage is determined by the combination of the phase states of the three legs. There are 27 possible switching states in total. Some of them result in a common mode voltage equal to Vd/2; these states are particularly useful for constant common mode voltage operation. Table 1 lists the output voltage level patterns that give VCM = Vd/2. The states are denoted by a three-digit code whose entries represent the phase voltage level of phase a, b and c, respectively.
| VaN | VbN | VcN | State | VCM |
|---|---|---|---|---|
| Vd/2 | Vd/2 | Vd/2 | 111 | Vd/2 |
| 0 | Vd/2 | Vd | 012 | Vd/2 |
| 0 | Vd | Vd/2 | 021 | Vd/2 |
| Vd/2 | 0 | Vd | 102 | Vd/2 |
| Vd | 0 | Vd/2 | 201 | Vd/2 |
| Vd/2 | Vd | 0 | 120 | Vd/2 |
| Vd | Vd/2 | 0 | 210 | Vd/2 |
It is worth noting that the state 111 can be realized by two different switch configurations: one where all upper inner switches are on and all lower inner switches are off, and another where the opposite configuration is used. The complete switch-level realization is shown in Table 2. In the table, X, Y and Z are auxiliary logic variables that will be used in the proposed modulation scheme.
| XYZ | S1a | S2a | S1b | S2b | S1c | S2c | State |
|---|---|---|---|---|---|---|---|
| 111 | 1 | 0 | 1 | 0 | 1 | 0 | 111 |
| 000 | 0 | 1 | 0 | 1 | 0 | 1 | 111 |
| 011 | 0 | 0 | 0 | 1 | 1 | 1 | 012 |
| 010 | 0 | 0 | 1 | 1 | 0 | 1 | 021 |
| 001 | 0 | 1 | 0 | 0 | 1 | 1 | 102 |
| 101 | 1 | 1 | 0 | 0 | 0 | 1 | 201 |
| 110 | 0 | 1 | 1 | 1 | 0 | 0 | 120 |
| 100 | 1 | 1 | 0 | 1 | 0 | 0 | 210 |
2 Conventional Carrier Modulation Strategies
In this section, we analyze three classic carrier-based modulation strategies for the flying capacitor multi-level solar inverter: in-phase disposition, opposite phase disposition, and phase shift modulation. For each scheme, the switching states are determined by comparing the three reference modulating waves with one or two triangular carriers. The common mode voltage evolution inside a switching period is studied with reference to the switching state combinations.
2.1 In-Phase Disposition Modulation
In the in-phase disposition (IPD) scheme, two vertically disposed triangular carriers with the same phase are used. During the positive half-cycle of the modulating wave, the lower switch S2x is kept on and the switch S3x is kept off. The high-frequency switching between S1x and S4x then generates either Vd or Vd/2 at the phase output. During the negative half-cycle, S1x is kept off and S4x is kept on, while S2x and S3x switch to produce Vd/2 or 0. For a balanced three-phase system, the instantaneous common mode voltage changes at six times the switching frequency within one carrier period. The peak value of the common mode voltage is 5Vd/6, and the minimum is Vd/3, giving a peak-to-peak variation of Vd/2.
2.2 Opposite Phase Disposition Modulation
The opposite phase disposition (OPD) modulation uses two carriers with opposite phases. The switch control mechanism is otherwise similar to that of the IPD method. Since the carriers are shifted by 180°, the switching actions of different phases are better distributed within a switching period. As a result, the common mode voltage oscillates between Vd/3 and 2Vd/3, and the peak-to-peak value is reduced to Vd/3. Although the common mode voltage ripple is smaller than that of the IPD scheme, it still contains a significant high-frequency component.
2.3 Phase Shift Modulation
In the phase shift (PS) modulation scheme, two triangular carriers with a 180° phase shift are also used, but all power switches operate at high frequency, independent of the polarity of the modulating wave. For each phase leg, the phase output voltage has three levels: Vd, Vd/2 and 0. The switching actions are interleaved among the three phases, which leads to a smoother common mode voltage. Similar to the OPD scheme, the common mode voltage in the phase shift arrangement varies between Vd/3 and 2Vd/3, with the same peak-to-peak amplitude of Vd/3. Despite having a smaller common mode voltage ripple than the IPD method, the residual high-frequency common mode voltage is still large enough to produce a common mode current that may violate practical standards.
Table 3 summarizes the common mode voltage characteristics of the three conventional modulation schemes.
| Modulation | Min VCM | Max VCM | Peak-to-peak VCM |
|---|---|---|---|
| In-phase disposition | Vd/3 | 5Vd/6 | Vd/2 |
| Opposite phase disposition | Vd/3 | 2Vd/3 | Vd/3 |
| Phase shift | Vd/3 | 2Vd/3 | Vd/3 |
3 Proposed Single-Carrier Modulation
From the common mode model, the ideal way to suppress the common mode current in transformerless solar inverters is to keep the common mode voltage constant. The conventional modulation methods described above fail to do so. To overcome this problem, we propose a novel single-carrier modulation strategy. The fundamental idea is to select only those switching states for which the common mode voltage is exactly Vd/2. As shown in Table 1, there are seven such output voltage level patterns: 111, 012, 021, 102, 201, 120 and 210. The pattern 111 can be implemented by two different switch configurations, giving a total of eight valid switching states, as listed in Table 2. If the inverter is controlled so that it always stays in one of these eight states, the common mode voltage remains constant and the common mode current is naturally suppressed.
In the proposed method, the three reference modulating signals ma, mb and mc are compared with a single high-frequency triangular carrier. This comparison produces three instantaneous logic variables X, Y and Z. Instead of using X, Y and Z directly as gate signals, they are fed into a Boolean logic block that generates the appropriate driving signals for the six controllable switches. The Boolean relationships are derived from Table 2 using standard Karnaugh-map minimization. The minimized expressions are
$$
\begin{aligned}
S_{1a} &= X(\bar{Y} + Z), \\
S_{2a} &= \bar{Y} + X\bar{Z}, \\
S_{1b} &= Y(\bar{Z} + X), \\
S_{2b} &= \bar{Z} + \bar{X}Y, \\
S_{1c} &= Z(\bar{X} + Y), \\
S_{2c} &= \bar{X} + \bar{Y}Z.
\end{aligned} \tag{4}
$$
The complementary switches S3x and S4x in each phase are directly obtained as the complements of S1x and S2x, respectively. Since the logic functions map the eight possible combinations of X, Y and Z into the eight valid switching states, the converter always operates in states with constant common mode voltage. In other words, every sampled state in the proposed modulation has VCM = Vd/2. Thus the common mode voltage remains constant in every switching period, and the common mode current is effectively eliminated.
The proposed modulation retains the simplicity of a single-carrier implementation. No complex space-vector sector identification is required. The carrier comparison and the Boolean operations can be easily implemented in a digital controller such as an FPGA. The computational burden is very low, and the method can be extended to different flying capacitor multi-level solar inverter configurations without difficulty.
4 Experimental Verification
To validate the proposed common mode current suppression technique, a laboratory prototype of the three-phase three-level flying capacitor solar inverter was built. The control system is based on a TMS320F28335 DSP and a XC3S400 FPGA. The main circuit parameters are listed in Table 4.
| Parameter | Value |
|---|---|
| DC bus voltage Vd | 120 V |
| IGBT module | IKW40T120 |
| Switching frequency | 10 kHz |
| Flying capacitor | 470 µF / 450 V |
| Filter inductor | 5 mH |
| Parasitic capacitance Cpv | 300 nF |
Three conventional modulation strategies and the proposed scheme were implemented on the same prototype. The phase-to-neutral voltages and the common mode voltage were measured with a time window of two switching periods. In the in-phase disposition modulation, the common mode voltage fluctuated between Vd/3 and 5Vd/6, with a peak-to-peak amplitude of about 60 V. In the opposite phase disposition scheme and the phase shift scheme, the common mode voltage ripple was reduced to around 40 V peak-to-peak. In contrast, when the proposed modulation was used, the common mode voltage remained almost constant at Vd/2 = 60 V. Only a small voltage notch could be observed during switching commutations. These results agree with the theoretical analysis.
The common mode current was measured through the parasitic capacitance path. The RMS value of the common mode current for each modulation strategy is presented in Table 5. The conventional in-phase disposition modulation produced a large common mode current of 385 mA RMS. The opposite phase disposition reduced it to 157 mA, and the phase shift scheme further reduced it to 42.7 mA. Nevertheless, none of these values satisfies the VDE-0126-1-1 standard, which recommends a maximum common mode current of 30 mA. The proposed modulation achieved an RMS common mode current of only 22.7 mA, well below the standard limit. This confirms that the constant common mode voltage provided by the new modulation is highly effective in suppressing the common mode current.
| Modulation strategy | Common mode current RMS |
|---|---|
| In-phase disposition | 385 mA |
| Opposite phase disposition | 157 mA |
| Phase shift | 42.7 mA |
| Proposed single-carrier | 22.7 mA |
The steady-state output waveforms were also examined. With the conventional in-phase disposition and opposite phase disposition methods, the line-to-line voltage exhibits a five-level waveform, but a slight asymmetry is observed because two switches operate at line frequency in each phase and the flying capacitor voltage presents a low-frequency ripple. In the phase shift modulation and in the proposed modulation, all switches operate at high frequency, so the five-level line-to-line voltage is symmetric. The measured total harmonic distortion (THD) of the line voltage is given in Table 6. The THD values are similar for all four strategies, showing that the proposed common mode current suppression does not significantly degrade the output voltage quality.
| Modulation strategy | Line voltage THD |
|---|---|
| In-phase disposition | 1.353% |
| Opposite phase disposition | 1.443% |
| Phase shift | 1.502% |
| Proposed single-carrier | 1.534% |
Finally, dynamic experiments were carried out to test the response of the proposed method during a sudden load change. The flying capacitor voltages remained balanced at approximately Vd/2, the common mode voltage stayed almost constant, and the common mode current remained below 30 mA throughout the transient. The results demonstrate that the proposed modulation strategy is suitable for practical transformerless solar inverter applications.
5 Conclusion
In this paper, we have studied the common mode current suppression problem in a three-phase three-level flying capacitor multi-level photovoltaic inverter for transformerless solar inverters. A common mode model was developed, and the influence of the switching states on the common mode voltage was analyzed. We compared the conventional in-phase disposition, opposite phase disposition, and phase shift modulation methods and showed that they all produce high-frequency common mode voltage variations. We then proposed a new single-carrier modulation strategy based on Boolean logic functions. The new method only utilizes the switching states for which the common mode voltage is constant and equal to Vd/2. The proposed modulation therefore completely eliminates the high-frequency common mode voltage, and the common mode current is effectively suppressed. Experimental results confirmed that the common mode current RMS value is reduced from 385 mA in the worst conventional case to 22.7 mA with the proposed method, which satisfies the VDE-0126-1-1 standard. The output voltage THD is similar to that of the conventional schemes, and the dynamic response is satisfactory. The proposed technique is a practical and low-cost solution for transformerless solar inverters.