In recent years, the environmental issues caused by fossil fuels have become increasingly prominent, leading to significant attention from experts and scholars worldwide towards the development and utilization of clean renewable energy sources such as solar, wind, and fuel cells. Solar inverters, as critical interface devices in grid-connected photovoltaic systems, directly impact the efficiency and safety of power generation systems. Isolated grid-connected inverters can separate the input side from the grid, enhancing safety, but the presence of transformers reduces system efficiency and increases costs. Therefore, transformerless grid-connected inverters have garnered widespread interest. However, traditional non-isolated full-bridge solar inverters generate leakage currents under various modulation strategies due to parasitic capacitances in photovoltaic panels. This leakage current poses electromagnetic interference and safety risks. To address this, I have developed an improved transformerless solar inverter that theoretically eliminates leakage current while offering flexible control through multiple modulation strategies. This article details the inverter’s topology, working principles, modulation strategies, parameter design, and experimental validation, emphasizing its advantages over existing solutions.
The proposed solar inverter topology is derived from a conventional full-bridge structure but incorporates a switching capacitor to connect the negative terminal of the DC input to the neutral point of the AC output. This configuration ensures that the common-mode voltage remains zero throughout the operational cycle, thereby suppressing leakage current. The basic circuit consists of a photovoltaic source, five switches (S1 to S5), a switching capacitor C1, filter inductors L1 and L2, a filter capacitor C, and the grid load ug. The evolution of this topology involves powering the load alternately from the PV source and the switching capacitor during positive and negative half-cycles, respectively, while replenishing the capacitor during freewheeling periods. The key sub-circuits include power transfer modes from the PV source, power transfer from the capacitor, and freewheeling modes with capacitor charging. Assuming ideal components, the analysis focuses on steady-state behavior without considering losses or parasitic parameters.
Leakage current analysis is crucial for transformerless solar inverters. The common-mode equivalent model includes filter inductors L1 and L2 and the PV panel’s parasitic capacitance Cpv. The common-mode voltage UCM and differential-mode voltage UDM at the output are defined as:
$$U_{CM} = \frac{U_{AN} + U_{BN}}{2}$$
$$U_{DM} = U_{AN} – U_{BN}$$
In the proposed solar inverter, during power transfer, the negative DC terminal is directly connected to the AC neutral, resulting in UAN = UPV and UBN = 0. Thus, the total common-mode voltage UCMV becomes:
$$U_{CMV} = U_{CM} + \frac{L_2 – L_1}{2(L_1 + L_2)} U_{DM} = 0$$
During freewheeling, UAN = UBN = 0, leading to UCMV = 0. Therefore, theoretically, the inverter completely eliminates leakage current, regardless of modulation strategy. This structural advantage simplifies control and enhances reliability for solar inverters in photovoltaic systems.
Modulation strategies play a vital role in the performance of solar inverters. The proposed inverter supports four distinct modulation strategies, offering flexibility in control. All strategies generate switch signals by comparing a carrier wave uc with a modulation wave ug. The key waveforms for each strategy are summarized below, with s1 to s5 representing the switch signals for S1 to S5.
| Modulation Strategy | Positive Half-Cycle | Negative Half-Cycle | Characteristics |
|---|---|---|---|
| Strategy I | S1, S5 always on; S3, S4 complementary SPWM | S4 always on; S1, S5, S2 SPWM with S1, S5 same as S2 complementary | Mixed frequency operation, moderate switching losses |
| Strategy II | All switches in SPWM; S1, S3, S5 same; S2, S4 same and complementary | Same as positive half-cycle | Bipolar modulation, high switching losses |
| Strategy III | S1, S5 always on; S3 SPWM | S4 always on; S1, S2 complementary SPWM | Unipolar modulation, reduced switching losses |
| Strategy IV | S5 always on; S3 SPWM; S1 off | S4 always on; S1, S2 complementary SPWM | Unipolar modulation, lowest switching losses |
Strategy IV is selected for simulation and experimental validation due to its lower power losses. In the positive half-cycle, the PV source supplies power through S3, while in the negative half-cycle, capacitor C1 supplies power through S2 and S4. Freewheeling modes involve inductor current circulation and capacitor charging. The equivalent circuits for each mode illustrate the current paths and voltage states, ensuring clear operational understanding.
Switch stress analysis is essential for reliable solar inverter design. For Modulation Strategy IV, the voltage and current stresses on switches S1 to S5 are derived from modal analysis. Assuming Uin as the input voltage and ig_max as the maximum output current, the maximum voltages are:
Positive half-cycle:
$$U_{S1\_max} = U_{S5\_max} = 0$$
$$U_{S2\_max} = U_{S3\_max} = U_{S4\_max} = U_{in}$$
Negative half-cycle:
$$U_{S4\_max} = 0$$
$$U_{S1\_max} = U_{S2\_max} = U_{S5\_max} = U_{in}$$
$$U_{S3\_max} = 2U_{in}$$
The current stresses depend on the duty cycle Dmax and capacitor ratio δ = C1/Cin. For the negative half-cycle:
$$i_{S1\_max} = i_{g\_max} \frac{2D_{max} + \delta}{2(1 + \delta)(1 – D_{max})}$$
$$i_{S5\_max} = i_{g\_max} \left(1 + \frac{2D_{max} + \delta}{2(1 + \delta)(1 – D_{max})}\right)$$
$$i_{S3\_max} = 0$$
$$i_{S2\_max} = i_{S4\_max} = i_{g\_max}$$
These equations guide component selection for solar inverters to ensure safe operation under various loads.
Parameter design is critical for optimizing solar inverter performance. The switching capacitor C1 must be sized to limit voltage ripple while supplying energy during the negative half-cycle. The energy released by C1 in each Δt interval during the negative half-cycle is:
$$Q = \frac{1}{2} C_1 (U_{C1\_1}^2 – U_{C1\_2}^2)$$
The energy absorbed by the load in the same interval, assuming unity power factor, is:
$$Q = \int_{t_1}^{t_1 + \Delta t} U_g \sin(\omega t) I_g \sin(\omega t) dt = \frac{U_g I_g}{2} \left( \Delta t – \frac{\sin(2\omega(t_1 + \Delta t)) – \sin(2\omega t_1)}{2\omega} \right)$$
With Δt as half the switching period and ripple limited to 0.5% of UC1, the minimum capacitance is calculated as approximately 63 μF. A value of 470 μF is chosen to further reduce ripple, enhancing stability for solar inverters.
The LCL filter design ensures low harmonic distortion in grid-connected solar inverters. The inverter-side current to output voltage transfer function is:
$$G_1(s) = \frac{i_{inv}(s)}{u_{inv}(s)} = \frac{L_2 C s^2 + 1}{L_1 L_2 C s^3 + (L_1 + L_2) s}$$
Under PI control, the closed-loop transfer function becomes:
$$G_2(s) = \frac{K_1 L_2 C s^2 + K_2 L_2 C s + s + K_2}{L_1 L_2 C s^4 + K_1 L_2 C s^3 + (K_1 K_2 L_2 C + L_1 + L_2) s^2 + K_1 s + K_1 K_2}$$
where K1 = KPKd and K2 = KI/KP. Discrete-domain analysis reveals stability issues at resonance frequencies. To mitigate this, passive damping via a series resistor r with the filter capacitor is employed. The damped transfer function is:
$$G_1′(s) = \frac{L_2 C s^2 + C r s + 1}{L_1 L_2 C s^3 + C r (L_1 + L_2) s^2 + (L_1 + L_2) s}$$
The damping resistor r is typically set to one-third of the capacitive reactance at resonance: r = 1/(3ωrC). With a resonant frequency ωr = 1/√(LeqC), where Leq = L1L2/(L1 + L2), r is chosen as 2 Ω. This approach balances stability and efficiency in solar inverters.
Loss analysis evaluates the efficiency of solar inverters. The main losses include switching losses, conduction losses, capacitor ESR losses, and filter losses. For a 1 kW output, the distribution is summarized below:
| Loss Type | Description | Approximate Value (W) |
|---|---|---|
| Switch Conduction (PSR) | Due to on-state resistance | 8.5 |
| Switch Turn-on (Pson) | Energy loss during turn-on | 3.2 |
| Switch Turn-off (Psoff) | Energy loss during turn-off | 2.8 |
| Capacitor ESR (PESR) | Due to equivalent series resistance | 4.1 |
| Filter Losses (PLCL) | Inductor and resistor losses | 5.4 |
The overall efficiency curve shows that efficiency exceeds 98% above 400 W, peaking near 600 W. This high efficiency makes the inverter suitable for various photovoltaic applications, reinforcing the advantages of transformerless solar inverters.
Comparative analysis highlights the superiority of the proposed solar inverter. Key metrics are compared with H5, H6, and HERIC inverters under identical conditions: input voltage 400 V, grid voltage 220 V/50 Hz, and output power 1 kW.
| Topology | Switch Count | Diode Count | Leakage Current (mA) | Efficiency (%) |
|---|---|---|---|---|
| H5 Inverter | 5 | 0 | 88.6 | 97.3 |
| H6 Inverter | 6 | 2 | 43.6 | 96.7 |
| HERIC Inverter | 6 | 2 | 82.4 | 96.2 | Proposed Solar Inverter | 5 | 0 | ~0 | 97.6 |
The proposed solar inverter uses fewer semiconductor devices than H6 and HERIC types, matches H5 in switch count, achieves near-zero leakage current, and offers higher efficiency. These benefits stem from its unique topology and modulation flexibility, making it a compelling choice for modern photovoltaic systems.
Simulation and experimental results validate the theoretical analysis. A prototype was built with the following parameters: input voltage Uin = 200 V, switching frequency fs = 20 kHz, grid voltage Ug = 110 V, grid frequency fg = 50 Hz, output power P = 300 W, filter inductors L1 = 6 mH and L2 = 0.6 mH, filter capacitor C = 13 μF, damping resistor r = 2 Ω, and switching capacitor C1 = 470 μF. Modulation Strategy IV was employed.
The output waveforms show that the grid current ig closely follows the grid voltage Ug with unity power factor. The bridge arm voltages match the input voltage during active states. Switch voltage stresses align with theoretical predictions: S1 and S5 experience near-zero voltage in the positive half-cycle, while S3 endures double the input voltage in the negative half-cycle. Common-mode voltage and leakage current measurements confirm values close to zero, demonstrating effective suppression. Dynamic tests under power step changes reveal fast response and stable grid synchronization, proving the inverter’s robustness for solar applications.
In conclusion, I have presented a novel transformerless solar inverter that eliminates leakage current through a direct connection between the DC negative terminal and AC neutral point. The topology supports multiple modulation strategies, with Strategy IV offering low switching losses. Comprehensive design equations for parameters like the switching capacitor and LCL filter ensure optimal performance. Comparative analysis shows advantages in device count, leakage current suppression, and efficiency over existing inverters. Experimental results verify the theoretical claims, highlighting the inverter’s potential for safe and efficient photovoltaic systems. Future work may explore higher power levels and integration with energy storage, further advancing solar inverter technology.
The development of such solar inverters is crucial for the widespread adoption of photovoltaic energy. By addressing leakage current issues without sacrificing efficiency, this inverter contributes to more reliable and cost-effective solar power generation. As renewable energy demands grow, continuous innovation in solar inverter design will play a pivotal role in sustainable energy infrastructure.