In this article, I present a low-voltage ride-through control strategy for two-stage solar inverters operating under unbalanced grid faults. The proposed strategy is intended for solar inverters that use a front-end boost converter followed by a three-phase DC/AC inverter. My work focuses on the enhancement of grid-connected stability when the grid voltage becomes unbalanced. I first analyze the operating characteristics of solar inverters under unbalanced voltage sags and then propose a coordinated control method that operates on both the boost converter and the grid-side inverter. The boost converter is assigned the task of stabilizing the DC bus voltage during the fault, while the grid-side inverter uses a negative-sequence voltage feed-forward control scheme to suppress negative-sequence currents. A second-order generalized integrator is used to separate positive- and negative-sequence components of the unbalanced grid voltage. This allows the solar inverters to maintain three-phase balanced output currents, avoid overcurrent, provide reactive power support, and ride through the fault without additional hardware. I validated the complete control strategy in PSCAD/EMTDC using a 100 kW two-stage photovoltaic inverter model. The simulation results show that the proposed method is effective even when a single-phase voltage falls to 0.2 p.u.
Keywords: solar inverters; low voltage ride-through; two-stage photovoltaic system; unbalanced grid faults; negative-sequence voltage feed-forward; SOGI; PSCAD/EMTDC.
1. Introduction
The integration of photovoltaic power generation into modern power systems has grown rapidly. As the penetration level increases, the influence of photovoltaic systems on power system stability and security becomes more significant. Grid operators now require solar inverters to remain connected and provide voltage support during grid faults. This capability is commonly called low voltage ride-through. In particular, solar inverters connected to medium-voltage distribution networks must adhere to strict grid codes. These grid codes define the minimum voltage-time profile that the inverter must tolerate before it is allowed to disconnect. They also define the amount of reactive current that solar inverters must inject during the voltage sag.
In my research, I focus on two-stage solar inverters. A two-stage topology consists of a boost converter and an inverter. The boost converter is normally responsible for maximum power point tracking, while the inverter regulates the DC bus voltage and controls the active and reactive power delivered to the grid. During a grid fault, especially an unbalanced fault, the inverter output power capability is reduced. If the boost converter continues to extract maximum power from the photovoltaic array, the surplus power will charge the DC-link capacitor and cause the DC bus voltage to rise. This can damage the DC-link capacitor and also lead to overcurrent in the grid-side inverter. Therefore, the control strategy for two-stage solar inverters must be modified during low voltage ride-through operation.
Many existing studies address single-stage solar inverters. For single-stage inverters, the PV array is connected directly to the inverter, and the inverter itself must handle maximum power point tracking, DC bus voltage control, and grid current control. Those strategies are not directly applicable to two-stage solar inverters because the boost converter introduces an additional power conversion stage. Some researchers have proposed adding hardware circuits such as crowbars, dump loads, or supercapacitors to absorb the surplus energy. These hardware solutions are effective but increase cost, weight, and complexity. In contrast, I decided to develop a control-based solution that does not require additional hardware. This is beneficial for existing two-stage solar inverters because the modification can be implemented in software or firmware.
My main contributions in this work are as follows. First, I study the behavior of two-stage solar inverters under unbalanced grid faults and identify the power imbalance between the PV side and the grid side as the key challenge. Second, I propose a boost converter control scheme that uses a pre-fault maximum power point voltage feed-forward signal to regulate the DC bus voltage during low voltage ride-through. Third, I design a grid-side current controller with negative-sequence voltage feed-forward so that the output current remains three-phase balanced even when the grid voltage contains negative-sequence components. Fourth, I integrate a second-order generalized integrator based positive- and negative-sequence separation module into the phase-locked loop. Finally, I verify the entire strategy through detailed electromagnetic transient simulation of a 100 kW photovoltaic inverter.
2. Low Voltage Ride-Through Requirements
Low voltage ride-through is one of the most important grid support functions for modern solar inverters. The requirement is that the inverter must stay connected to the grid when the point of common coupling voltage drops due to a fault. The inverter may only disconnect if the voltage at the point of common coupling remains below the prescribed curve for longer than the allowed time. The grid code also requires the inverter to supply reactive current in proportion to the voltage dip depth. This reactive current injection helps the grid voltage recover after the fault is cleared.
In my study, I define the voltage sag depth as the ratio of the positive-sequence voltage magnitude during the fault to the nominal voltage magnitude:
$$ K = \frac{U_{d,fault}^{P}}{U_{N}}, $$
where \(U_{d,fault}^{P}\) is the d-axis positive-sequence voltage component during the fault and \(U_{N}\) is the rated voltage at the point of common coupling. Under normal operation, \(K\) is close to one. When a fault occurs, \(K\) decreases. In my control strategy, the low voltage ride-through mode is activated when \(K < 0.9\).
The most important grid code requirements that I considered in this work are summarized in the table below. These requirements influence the design of the current references and the operating mode of the boost converter.
| Requirement | Description |
|---|---|
| Fault ride-through | Solar inverters must remain connected to the grid during balanced and unbalanced voltage sags as long as the voltage stays above the grid code curve. |
| Activation threshold | Low voltage ride-through is activated when the positive-sequence voltage sag depth satisfies \(K < 0.9\). |
| Reactive power support | The inverter must inject reactive current during the fault. The maximum reactive current is limited by the inverter current rating. |
| Current limiting | The inverter output current must not exceed its maximum allowable value throughout the fault. |
| Active power balance | The boost converter must reduce PV output power when the grid cannot absorb it, preventing DC bus overvoltage. |
| Post-fault recovery | The inverter should return to normal operation quickly after the fault is cleared. |
3. System Configuration of Two-Stage Solar Inverters
The two-stage solar inverter structure considered in my study is shown by the system architecture in which a photovoltaic array is connected to a boost converter, and the boost converter feeds a DC bus. The DC bus is connected to a three-phase inverter through DC-link capacitors. The inverter output is connected to the grid through an L filter. The boost converter and the inverter are controlled independently by separate controllers. In my research, this topology is particularly important because the presence of the boost converter changes the way low voltage ride-through must be implemented.
The main simulation parameters that I used to model this system are given in the following table.
| Parameter | Symbol | Value | Unit |
|---|---|---|---|
| Rated system power | \(P_{N}\) | 100 | kW |
| Boost circuit capacitance | \(C\) | 3000 | μF |
| Boost circuit inductance | \(L_{b}\) | 0.15 | mH |
| DC bus reference voltage | \(U_{dc}^{ref}\) | 800 | V |
| Grid phase voltage peak | \(E_{max}\) | 220 | V |
| Rated inverter current | \(I_{N}\) | 300 | A |
| DC-link stabilizing capacitor | \(C_{1}, C_{2}\) | 3000 | μF |
| L filter inductance | \(L\) | 0.45 | mH |
| Grid frequency | \(f\) | 50 | Hz |
In normal operation, the boost converter regulates the PV array voltage according to the maximum power point tracking algorithm. The inverter controls the DC bus voltage and the grid-side currents. The power balance equation between the PV side and the grid side can be written as:
$$ P_{pv} = P_{out} + P_{dc}, $$
where \(P_{pv}\) is the power delivered by the photovoltaic array, \(P_{out}\) is the power delivered to the grid, and \(P_{dc}\) is the power flowing into the DC-link capacitor. Under normal conditions, \(P_{dc}\) is nearly zero. When a voltage sag occurs, the grid-side power \(P_{out}\) decreases rapidly. If \(P_{pv}\) remains unchanged, the surplus power \(P_{dc}\) charges the DC-link capacitor. The DC bus voltage then rises according to:
$$ C_{dc}\frac{dU_{dc}}{dt} = I_{pv} – I_{inv}, $$
where \(I_{pv}\) is the PV array output current, \(I_{inv}\) is the inverter input current, and \(C_{dc}\) is the total DC-link capacitance. This equation is the starting point of my proposed control strategy. I need to ensure that the boost converter reduces \(I_{pv}\) or \(P_{pv}\) during the fault so that the DC bus voltage remains within a safe range.
4. Conventional Control Structure
In a conventional two-stage solar inverter, the boost converter uses a maximum power point tracking controller to generate a voltage reference \(U_{pv}^{ref}\). The duty cycle of the boost converter is then adjusted by a PI controller so that the PV array voltage follows this reference. The grid-side inverter uses a voltage-oriented vector control method in the synchronous reference frame.
For the grid-side inverter, the mathematical model in the synchronous \(dq\) reference frame can be written as:
$$ e_{d} = u_{d} + R i_{d} + L \frac{di_{d}}{dt} – \omega L i_{q}, $$
$$ e_{q} = u_{q} + R i_{q} + L \frac{di_{q}}{dt} + \omega L i_{d}, $$
where \(e_{d}\) and \(e_{q}\) are the grid voltage components, \(u_{d}\) and \(u_{q}\) are the inverter output voltage components, \(i_{d}\) and \(i_{q}\) are the grid current components, \(R\) is the filter resistance, \(L\) is the filter inductance, and \(\omega\) is the grid angular frequency.
The conventional current controller is designed using two PI controllers with feed-forward decoupling. The output voltage references can be expressed as:
$$ u_{d} = \left(k_{ip} + \frac{k_{ii}}{s}\right)\left(i_{d}^{*} – i_{d}\right) – \omega L i_{q} + e_{d}, $$
$$ u_{q} = \left(k_{ip} + \frac{k_{ii}}{s}\right)\left(i_{q}^{*} – i_{q}\right) + \omega L i_{d} + e_{q}, $$
where \(k_{ip}\) and \(k_{ii}\) are the proportional and integral gains of the current controller, and \(i_{d}^{*}\) and \(i_{q}^{*}\) are the reference currents. In normal operation, \(i_{d}^{*}\) is generated by the DC bus voltage controller, and \(i_{q}^{*}\) is set according to the reactive power command, usually zero for unity power factor.
This conventional control structure works well as long as the grid voltage is sinusoidal and balanced. However, during an unbalanced grid fault, the grid voltage contains both positive- and negative-sequence components. The conventional PI controller in the positive synchronous reference frame cannot control the negative-sequence current component. As a result, the output current becomes unbalanced. The negative-sequence current also creates a double-frequency power oscillation at the AC side. This double-frequency oscillation propagates to the DC side and causes the DC bus voltage to oscillate at twice the grid frequency. In addition, because the boost converter continues to extract maximum power from the PV array, the average DC bus voltage can rise sharply. This is the main reason why conventional control is not sufficient for two-stage solar inverters.
5. Proposed LVRT Control Strategy
5.1. Boost Converter Control During Low Voltage Ride-Through
I designed a new boost converter control strategy to solve the DC bus overvoltage problem. Instead of using maximum power point tracking during the fault, I use a DC bus voltage control outer loop. This outer loop generates a correction signal based on the error between the measured DC bus voltage and the DC bus reference voltage. The correction signal is added to the pre-fault maximum power point voltage \(U_{max}\). This modifies the PV array operating point and reduces the power extracted from the PV array when the DC bus voltage rises.
The control structure is shown conceptually by the following relationship:
$$ U_{pv}^{**} = U_{max} + \left(k_{bp} + \frac{k_{bi}}{s}\right)\left(U_{dc} – U_{dc}^{ref}\right), $$
where \(U_{pv}^{**}\) is the modified PV array voltage reference used during low voltage ride-through, \(U_{max}\) is the maximum power point voltage captured before the fault, \(k_{bp}\) and \(k_{bi}\) are the proportional and integral gains of the boost voltage controller, \(U_{dc}\) is the measured DC bus voltage, and \(U_{dc}^{ref}\) is the DC bus reference voltage.
To understand why this method works, I analyzed the \(P\)-\(U\) characteristic curve of the photovoltaic array. The output power of the photovoltaic array is:
$$ P_{pv} = U_{pv} I_{pv}, $$
where \(I_{pv}\) is a nonlinear function of \(U_{pv}\) and solar irradiance. At the maximum power point, the derivative of power with respect to voltage is zero:
$$ \frac{dP_{pv}}{dU_{pv}} = 0. $$
The maximum power point voltage is normally around 0.8 times the open-circuit voltage of the PV array. On the \(P\)-\(U\) curve, the slope on the right-hand side of the maximum power point is steeper than the slope on the left-hand side. If the PV array operating voltage is shifted to the right of the maximum power point, the output power decreases significantly. Therefore, when the DC bus voltage rises during a fault, the proposed controller produces a positive correction signal. This signal increases the PV array voltage reference, moves the operating point to the right of the maximum power point, and reduces the PV output power. The reduction in PV power balances the reduced grid-side power and prevents the DC bus voltage from continuing to rise.
The advantage of using the pre-fault maximum power point voltage \(U_{max}\) as a feed-forward signal is that the controller can respond quickly. The feed-forward component places the PV operating point near the maximum power point before the PI controller starts adjusting. The PI controller then only needs to compensate for the difference between the actual operating point and the desired operating point. This makes the response fast and avoids large transient deviations. The result is a stable DC bus voltage during the low voltage ride-through interval.
5.2. Positive- and Negative-Sequence Separation Based on SOGI
For unbalanced grid voltage, I need to separate the voltage into positive- and negative-sequence components. I used a second-order generalized integrator based method. The SOGI structure produces two orthogonal signals. One output signal \(v’\) has the same amplitude and phase as the input signal. The other output signal \(qv’\) has the same amplitude but lags by 90 degrees.
The transfer functions of the SOGI can be written as:
$$ D(s) = \frac{v’}{v} = \frac{k \omega’ s}{s^{2} + k \omega’ s + \omega’^{2}}, $$
$$ Q(s) = \frac{q v’}{v} = \frac{k \omega’^{2}}{s^{2} + k \omega’ s + \omega’^{2}}, $$
where \(\omega’\) is the center frequency of the SOGI filter, and \(k\) is the damping coefficient. In my work, I chose \(k = \sqrt{2}\). The first transfer function \(D(s)\) has a band-pass characteristic, while the second transfer function \(Q(s)\) has a low-pass characteristic. When the center frequency \(\omega’\) is tuned to the grid frequency, the output \(v’\) equals the input \(v\), and \(qv’\) is the quadrature signal. This quadrature generation is the fundamental building block for separating positive- and negative-sequence components.
Using the positive- and negative-sequence separation equations in the stationary \(\alpha\beta\) reference frame, the positive-sequence components can be obtained as:
$$ v_{\alpha}^{P} = \frac{1}{2}\left(v_{\alpha} – q v_{\beta}\right), $$
$$ v_{\beta}^{P} = \frac{1}{2}\left(q v_{\alpha} + v_{\beta}\right), $$
and the negative-sequence components can be obtained as:
$$ v_{\alpha}^{N} = \frac{1}{2}\left(v_{\alpha} + q v_{\beta}\right), $$
$$ v_{\beta}^{N} = \frac{1}{2}\left(-q v_{\alpha} + v_{\beta}\right), $$
where \(q\) represents the 90-degree phase lag operator implemented by the SOGI module. Once the positive-sequence components are available, I can calculate the grid voltage phase angle using a conventional synchronous reference frame phase-locked loop. The phase-locked loop is driven by the q-axis positive-sequence voltage:
$$ \omega_{pll} = k_{p,pll} v_{q}^{P} + k_{i,pll} \int v_{q}^{P} dt, $$
$$ \theta^{P} = \int \omega_{pll} dt. $$
This SOGI-based positive- and negative-sequence separation method is simple, accurate, and robust to distorted grid voltages. It is particularly suitable for solar inverters because the sequence separation module does not require complex matrix calculations. The SOGI module can also filter out some high-frequency harmonics, which improves the quality of the phase-locked loop signal.
5.3. Current Control with Negative-Sequence Voltage Feed-Forward
After the positive- and negative-sequence voltages are separated, I can design the current controller. The voltage-oriented current controller in the positive synchronous reference frame is responsible for controlling the positive-sequence current. The negative-sequence current controller is responsible for eliminating the negative-sequence current. In my proposed method, the negative-sequence current reference is set to zero. This ensures that the output current remains three-phase balanced during the unbalanced grid fault.
The AC-side mathematical model in the positive and negative synchronous reference frames can be written as:
$$ e_{d}^{P} = u_{d}^{P} + R i_{d}^{P} + L \frac{di_{d}^{P}}{dt} – \omega L i_{q}^{P}, $$
$$ e_{q}^{P} = u_{q}^{P} + R i_{q}^{P} + L \frac{di_{q}^{P}}{dt} + \omega L i_{d}^{P}, $$
$$ e_{d}^{N} = u_{d}^{N} + R i_{d}^{N} + L \frac{di_{d}^{N}}{dt} + \omega L i_{q}^{N}, $$
$$ e_{q}^{N} = u_{q}^{N} + R i_{q}^{N} + L \frac{di_{q}^{N}}{dt} – \omega L i_{d}^{N}. $$
For the positive-sequence current controller, I use PI controllers with decoupling terms and voltage feed-forward:
$$ u_{d}^{P*} = \left(k_{ip} + \frac{k_{ii}}{s}\right)\left(i_{d}^{P*} – i_{d}^{P}\right) – \omega L i_{q}^{P} + e_{d}^{P}, $$
$$ u_{q}^{P*} = \left(k_{ip} + \frac{k_{ii}}{s}\right)\left(i_{q}^{P*} – i_{q}^{P}\right) + \omega L i_{d}^{P} + e_{q}^{P}. $$
For the negative-sequence current controller, the current references are zero. The negative-sequence grid voltage is fed forward to compensate for the negative-sequence component of the grid voltage. The control equations are:
$$ u_{d}^{N*} = \left(k_{ip} + \frac{k_{ii}}{s}\right)\left(0 – i_{d}^{N}\right) + \omega L i_{q}^{N} + e_{d}^{N}, $$
$$ u_{q}^{N*} = \left(k_{ip} + \frac{k_{ii}}{s}\right)\left(0 – i_{q}^{N}\right) – \omega L i_{d}^{N} + e_{q}^{N}. $$
These two controllers operate in parallel. The reference voltages are transformed back to the stationary \(\alpha\beta\) frame and then combined to generate the final modulation signals. With this structure, the negative-sequence voltage feed-forward acts as an active disturbance rejection term. If the grid voltage contains a negative-sequence component, the controller immediately generates a compensating voltage. As a result, the negative-sequence current is suppressed, and the inverter output current remains balanced.
5.4. Current Reference Generation for Reactive Power Support
During low voltage ride-through, I also want the solar inverters to provide reactive power support to the grid. I determine the active and reactive current references directly from the voltage sag depth \(K\). The maximum allowable current amplitude is defined as \(i_{max}\). I set the active current reference to a maximum value first and then reduce it gradually to a value proportional to the voltage sag depth. The expression for the active current reference is:
$$ i_{d,fault}^{*} = i_{max} – i_{R}\left(t – t_{1}\right), $$
for \(i_{d,fault}^{*} \geq K i_{max}\). Here, \(t_{1}\) is the time when the current adjustment begins, and \(i_{R}\) is the ramp rate. The active current is reduced until it reaches \(K i_{max}\). Once the active current reference is known, the reactive current reference is calculated from the inverter current limit:
$$ i_{q,fault}^{*} = \sqrt{i_{max}^{2} – \left(i_{d,fault}^{*}\right)^{2}}. $$
This method ensures that the inverter always operates at the maximum allowable current without exceeding the current limit. When the voltage sag depth is large, \(K\) is small. The active current decreases, and the remaining current capacity is used for reactive power support. This is exactly what the grid needs during a low voltage ride-through event. The reactive current injection helps to support the grid voltage and accelerates voltage recovery.
5.5. Overall Control Structure
The overall control structure that I designed includes three main parts. The first part is the boost converter controller. During normal operation, it uses maximum power point tracking. After a fault is detected, it switches to the DC bus voltage control mode with the pre-fault maximum power point voltage feed-forward. This part prevents DC bus overvoltage by reducing the PV output power. The second part is the positive- and negative-sequence separation module based on SOGI. This module provides the positive- and negative-sequence voltage components and the grid phase angle. The third part is the grid-side current controller. It controls the positive-sequence current to deliver active and reactive power, and it suppresses the negative-sequence current using voltage feed-forward. Together, these three parts allow two-stage solar inverters to ride through unbalanced faults safely.
6. Simulation Verification
I used PSCAD/EMTDC to build a detailed simulation model of a 100 kW two-stage solar inverter. The model includes the photovoltaic array, the boost converter, the DC-link capacitors, the three-phase inverter, the L filter, and the grid. I implemented both the conventional control strategy and the proposed low voltage ride-through control strategy. I then compared the responses of the two strategies under a single-phase voltage sag. In this fault scenario, one phase voltage dropped to 0.2 p.u. while the other two phase voltages remained at the rated value.
This is one of the most severe unbalanced fault conditions that solar inverters can experience. A single-phase voltage sag produces a significant negative-sequence voltage component. If the inverter does not have a negative-sequence current controller, the output current will contain a large negative-sequence component. This causes unbalanced heating and may trip the overcurrent protection of one phase. The proposed strategy is designed to avoid this by using negative-sequence voltage feed-forward.
In the first simulation, I applied the conventional controller to the two-stage solar inverter. When the grid voltage sag occurred, the boost converter continued to track the maximum power point. As a result, the PV array continued to generate full power while the grid-side inverter could not deliver the same amount of power due to the reduced grid voltage. The DC bus voltage increased rapidly. The maximum DC bus voltage reached approximately 880 V. At the same time, the double-frequency power oscillation caused the DC bus voltage to oscillate with an amplitude of approximately 70 V. The output current became unbalanced and contained harmonics. The maximum phase current reached approximately 482 A. This value is far higher than the rated current of the inverter and cannot be allowed in practical solar inverters.
In the second simulation, I used the proposed low voltage ride-through control strategy. The results show that the proposed strategy kept the output current three-phase balanced throughout the fault. The negative-sequence current was effectively suppressed by the grid-side current controller. The boost converter reduced the PV output power after detecting the DC bus voltage rise. The DC bus voltage increased slightly at the beginning of the fault, but the increase was suppressed within approximately 5 ms. The maximum DC bus voltage was about 865 V. After the transient, the DC bus voltage stabilized between 785 V and 820 V. The DC bus voltage ripple was reduced to approximately 30 V. The proposed strategy also allowed the inverter to generate reactive current of about 220 A during the fault. This reactive current provides valuable voltage support to the grid and helps the system recover after the fault is cleared.
The table below compares the simulation results of the conventional controller and the proposed LVRT controller.
| Observed Quantity | Conventional Strategy | Proposed LVRT Strategy |
|---|---|---|
| Three-phase current symmetry | Unbalanced | Balanced |
| Maximum phase current | 482 A | Within safe limit |
| Maximum DC bus voltage | 880 V | 865 V |
| DC bus voltage ripple | About 70 V | About 30 V |
| DC bus voltage suppression time | Not suppressed | About 5 ms |
| Reactive power support | Not provided | Reactive current about 220 A |
| Overcurrent risk | Significant | Prevented |
From these simulation results, I draw several important conclusions. First, the proposed boost converter control can effectively prevent DC bus overvoltage in two-stage solar inverters. The pre-fault maximum power point voltage feed-forward gives a fast and smooth response. Second, the negative-sequence voltage feed-forward current controller can eliminate the negative-sequence current under unbalanced grid faults. This ensures that the solar inverters remain connected and continue to transfer power without severe overcurrent. Third, the proposed current reference calculation method allows the inverter to provide reactive power support within the current limit. This is important for grid voltage recovery.
Another aspect that I examined was the transient behavior at the beginning of the fault. When the voltage sag first occurs, the positive-sequence voltage decreases and the negative-sequence voltage appears. The phase-locked loop must detect the positive-sequence voltage correctly so that the current controller can operate in the correct reference frame. My SOGI-based sequence separator is able to extract the positive-sequence component quickly. Because the SOGI module has a certain filtering bandwidth, it rejects high-frequency noise and provides a stable phase angle. This stable phase angle helps the current controller maintain synchronization during the fault.
The proposed strategy also works well in terms of power balance. At the moment of the fault, the grid-side power drops. The capacitor voltage starts to rise. The boost controller senses this voltage rise and increases the PV array voltage reference. Because the PV array operates on the right side of the maximum power point, its output power decreases. This reduces the power injected into the DC link. After a short transient, the PV power matches the grid-side power and the DC bus voltage reaches a new equilibrium. This equilibrium is maintained until the grid voltage recovers. When the grid voltage recovers, the grid-side power capability increases. The boost controller then reduces the PV voltage reference and returns the PV array to the maximum power point. The inverter returns to normal operation automatically.
I also considered the effect of the ramp rate \(i_{R}\) in the active current reference. If the active current is reduced too quickly, the DC bus voltage may dip below the reference value. If the active current is reduced too slowly, the DC bus voltage may exceed the safe limit for too long. In my simulation, I selected a ramp rate that balances these two effects. The resulting DC bus voltage transient is acceptable and the reactive current rises quickly after the fault is detected. This demonstrates that the current reference generation method is practical for real solar inverters.
The table below summarizes the design decisions that I implemented in the proposed control strategy.
| Design Block | Control Objective | Implementation |
|---|---|---|
| Boost converter controller | Stabilize DC bus voltage during LVRT | Use pre-fault MPP voltage feed-forward plus DC bus voltage PI outer loop |
| Grid positive-sequence current controller | Control active and reactive positive-sequence current | PI with decoupling and positive-sequence voltage feed-forward |
| Grid negative-sequence current controller | Suppress negative-sequence output current | PI with zero reference and negative-sequence voltage feed-forward |
| Positive- and negative-sequence separation | Extract sequence components for control and PLL | SOGI-based quadrature signal generator |
| Current reference generation | Provide reactive power support and protect inverter | Derive \(i_{d,fault}^{*}\) and \(i_{q,fault}^{*}\) from \(K\) and \(i_{max}\) |
I believe this control strategy is well suited for industrial two-stage solar inverters. The strategy does not require additional sensors, additional switches, crowbar circuits, or energy storage devices. It only modifies the existing controllers of the boost converter and the grid-side inverter. This is a significant advantage for solar inverters that are already installed and operating. The software changes can be implemented with a simple update of the digital signal processor or microcontroller code.
7. Conclusion
In this article, I have studied the low voltage ride-through problem of two-stage solar inverters under unbalanced grid faults. I have shown that the key challenge is the power imbalance between the photovoltaic array and the grid-side inverter. This power imbalance causes DC bus overvoltage and overcurrent. The conventional maximum power point tracking control of the boost converter must be changed during the fault to protect the inverter. I have proposed a boost converter control method based on the pre-fault maximum power point voltage feed-forward. This method shifts the PV array operating point to the right of the maximum power point when the DC bus voltage rises. As a result, the PV output power is reduced and the DC bus voltage is stabilized.
For the grid-side inverter, I have proposed a current control strategy with negative-sequence voltage feed-forward. This strategy uses a SOGI-based positive- and negative-sequence separation module to obtain the sequence components of the grid voltage. The negative-sequence current reference is set to zero so that the output current remains balanced during the fault. The active and reactive current references are generated according to the voltage sag depth, allowing the inverter to provide reactive power support while respecting the current limit. The simulation results confirm that the proposed strategy can suppress the DC bus voltage rise within about 5 ms, reduce the DC bus voltage ripple to about 30 V, maintain three-phase balanced grid currents, and provide about 220 A of reactive current. These findings are valuable for the practical design and operation of modern solar inverters with low voltage ride-through capability.
In summary, the proposed low voltage ride-through control strategy is effective, practical, and easy to implement in two-stage solar inverters. It addresses both the DC-side and AC-side challenges caused by unbalanced grid faults. Future work can extend this strategy to grid faults with different depths, different unbalanced conditions, and multiple inverters connected in parallel. The control concept can also be adapted for solar inverters connected to weak grids or microgrids. I believe this work provides a useful reference for researchers and engineers working on grid-connected photovoltaic systems.