In recent years, the adoption of solar inverters in photovoltaic (PV) systems has grown significantly due to the global push for renewable energy. Among various types, transformerless solar inverters have gained attention for their lightweight design, compact size, and high efficiency. However, a critical issue in these systems is the leakage current that arises from the absence of galvanic isolation. This leakage current can lead to electromagnetic interference, distortion in grid current, increased power losses, and safety hazards for both equipment and personnel. Standards such as VDE-0126-1-1 mandate that leakage current must be below 300 mA in amplitude and 30 mA in RMS value, making it essential to develop effective suppression techniques. In this article, I explore a three-phase Heric topology derived from the single-phase version to address leakage current in transformerless solar inverters. I analyze the working principles, establish a common-mode model, investigate the impact of modulation strategies, and propose a novel Boolean logic-based modulation scheme to stabilize common-mode voltage, thereby suppressing leakage current. Simulation and experimental results are presented to validate the approach.
The core of the problem lies in the common-mode voltage (CMV) fluctuations that excite parasitic capacitances between PV panels and ground. In transformerless solar inverters, the lack of isolation allows CMV variations to induce high-frequency currents through these capacitances, leading to leakage. Traditional three-phase inverters, such as the two-level bridge topology, often fail to maintain a constant CMV, resulting in significant leakage. The three-phase Heric topology, an extension of the single-phase Heric circuit, offers a promising solution by enabling three-level output voltages per phase and five-level line voltages, which can be controlled to stabilize CMV. This article delves into the details of this topology, emphasizing the role of modulation in CMV control and leakage current mitigation.
To understand the operation, consider the three-phase Heric topology shown in simplified form. It consists of three phase legs, each with four switches (e.g., Sa1, Sa2, Sa3, Sa4 for phase A), where Sa3 and Sa4 form a bidirectional path connecting the output to the DC-link midpoint M. This structure allows each phase to operate in three states: “2” (output voltage Ud), “1” (output voltage Ud/2), and “0” (output voltage 0), defined as:
$$U_{xN} = \begin{cases} U_d & \text{“2” state: } S_{x1} \text{ on, } S_{x2}, S_{x3}, S_{x4} \text{ off} \\ U_d/2 & \text{“1” state: } S_{x3}, S_{x4} \text{ on, } S_{x1}, S_{x2} \text{ off} \\ 0 & \text{“0” state: } S_{x2} \text{ on, } S_{x1}, S_{x3}, S_{x4} \text{ off} \end{cases}$$
where x = a, b, c. The output line voltages become five-level, enhancing waveform quality and reducing filter requirements. The CMV is given by:
$$U_{CM} = \frac{U_{AN} + U_{BN} + U_{CN}}{3}$$
To model leakage, the parasitic capacitance CPV between PV panels and ground forms a resonant circuit with the grid-side inductors. The equivalent inductance L and CPV create a resonant frequency ωCM = √(3/(LCPV)). The voltage across CPV, denoted UON, relates to UCM via the transfer function:
$$G(s) = \frac{U_{ON}(s)}{U_{CM}(s)} = \frac{1}{1 + \frac{L C_{PV}}{3} s^2}$$
For typical values (e.g., L = 5 mH, CPV = 300 nF), G(s) acts as a low-pass filter with a cutoff around 10.1 kHz. If UCM contains high-frequency components, UON will fluctuate, driving leakage current. Conversely, a constant UCM results in UON = UCM, minimizing leakage. Thus, the key to suppressing leakage in solar inverters is to maintain a constant CMV through appropriate modulation.
Common modulation strategies for three-phase solar inverters, such as in-phase disposition (IPD) and opposite-phase disposition (OPD) carrier-based PWM, are analyzed for the Heric topology. With IPD, the CMV oscillates between Ud/3 and 5Ud/6, with a peak-to-peak value of 2Ud/3, leading to high-frequency CMV variations. OPD reduces the swing to Ud/3 to 2Ud/3, but CMV still fluctuates, causing significant leakage current. These issues highlight the need for a specialized modulation scheme tailored to the Heric topology to achieve CMV constancy.
The three-phase Heric topology has 27 possible switching states, each producing specific phase voltages and CMV values. To achieve constant CMV, a subset of states must be selected. The table below summarizes the switching states and corresponding CMV for key combinations that yield constant CMV, which are essential for leakage suppression in solar inverters.
| State (ABC) | UAN | UBN | UCN | UCM |
|---|---|---|---|---|
| 000 | 0 | 0 | 0 | 0 |
| 111 | Ud/2 | Ud/2 | Ud/2 | Ud/2 |
| 210 | Ud | Ud/2 | 0 | Ud/2 |
| 021 | 0 | Ud | Ud/2 | Ud/2 |
| 102 | Ud/2 | 0 | Ud | Ud/2 |
| 201 | Ud | 0 | Ud/2 | Ud/2 |
| 120 | Ud/2 | Ud | 0 | Ud/2 |
| 012 | 0 | Ud/2 | Ud | Ud/2 |
From this table, states like “210” and “021” produce a constant CMV of Ud/2, which is desirable for leakage control. To implement these states systematically, I propose a Boolean logic-based modulation scheme. This approach uses basic logic signals X, Y, Z derived from comparing three-phase modulation waves with carriers, and then applies logical operations to generate switch signals. The logic functions are defined as:
$$S_{a1} = X \cdot \overline{Y}, \quad S_{a2} = \overline{X} \cdot Y, \quad S_{a3} = S_{a4} = X \cdot Y + \overline{X} \cdot \overline{Y}$$
$$S_{b1} = Y \cdot \overline{Z}, \quad S_{b2} = \overline{Y} \cdot Z, \quad S_{b3} = S_{b4} = Y \cdot Z + \overline{Y} \cdot \overline{Z}$$
$$S_{c1} = \overline{X} \cdot Z, \quad S_{c2} = X \cdot \overline{Z}, \quad S_{c3} = S_{c4} = X \cdot Z + \overline{X} \cdot \overline{Z}$$
where X, Y, Z are binary signals (0 or 1) representing the comparison outcomes. This scheme ensures that only states with constant CMV are used, effectively suppressing leakage current in solar inverters. The modulation increases the equivalent switching frequency by a factor of two, improving harmonic performance while maintaining CMV stability.
To validate the proposal, simulation studies were conducted using Matlab/Simulink. Parameters included a DC-link voltage of 700 V, capacitance of 470 μF, switching frequency of 10 kHz, filter inductance of 5 mH, parasitic capacitance of 300 nF, grid voltage of 380 V/50 Hz, and power rating of 5 kW. The results compared IPD, OPD, and the proposed Boolean logic modulation. With IPD, the voltage across CPV showed high-frequency oscillations, and leakage current reached amplitudes up to 2 A, exceeding standards. OPD reduced the oscillations but still resulted in leakage current of 407 mA RMS. In contrast, the proposed scheme maintained a nearly constant voltage across CPV, with leakage current below 30 mA RMS, satisfying VDE-0126-1-1 requirements. These findings underscore the effectiveness of the Boolean logic approach in solar inverters.
Further simulations considered distorted grid conditions per IEEE Std 519-1992, with total harmonic distortion (THD) of 5% (including 4% fifth harmonic and 3% seventh harmonic). The leakage current remained largely unaffected by grid distortion, confirming the robustness of the modulation strategy for real-world solar inverter applications.
Experimental verification was performed on a down-scaled hardware prototype. The control circuit comprised a DSP (TMS320F28335) and an FPGA (Spartan3 XC3S400), with the Boolean logic functions implemented in the FPGA. Key parameters included a DC-link voltage of 250 V, DC capacitance of 470 μF, IGBT switches (IKW40T120), switching frequency of 10 kHz, filter inductance of 5 mH, and parasitic capacitance of 300 nF. The output line voltages exhibited five-level waveforms under all modulation strategies, but after filtering, sinusoidal currents were achieved. Measurements of the voltage across CPV and leakage current revealed that IPD caused high CMV fluctuations and leakage current of 1.16 A RMS, while OPD reduced it to 407 mA RMS. The proposed modulation resulted in a constant voltage across CPV and leakage current below 30 mA RMS, aligning with simulation results and demonstrating practical viability for solar inverters.
The advantages of this approach are manifold. First, the three-phase Heric topology inherently supports three-level phase voltages, reducing dv/dt stress and EMI. Second, the Boolean logic modulation is computationally efficient, avoiding complex sector judgments or vector time calculations common in space vector modulation. Third, it ensures constant CMV without sacrificing DC-link utilization, a common drawback in some three-level topologies. These benefits make it suitable for high-efficiency transformerless solar inverters in residential and commercial PV systems.
In conclusion, this article has presented a comprehensive study on leakage current suppression for three-phase transformerless solar inverters using a Heric topology and a novel Boolean logic-based modulation scheme. By analyzing the common-mode model and modulation impacts, I demonstrated that traditional strategies fail to stabilize CMV, leading to excessive leakage. The proposed modulation selects switching states that maintain constant CMV, effectively suppressing leakage current to within safety standards. Simulation and experimental results confirm the scheme’s efficacy, even under distorted grid conditions. Future work could explore soft-switching techniques to further improve efficiency and extend the approach to other multilevel solar inverter topologies. Overall, this contribution advances the design of reliable and efficient transformerless solar inverters, addressing a critical challenge in renewable energy integration.