In the context of renewable energy integration, low-voltage microgrid systems frequently employ parallel-connected inverters to meet high power demands. Among various types of solar inverters, three-phase inverters are widely used due to their ability to deliver balanced power and support grid stability. However, when multiple inverters operate in parallel, phase circulation—encompassing both inter-phase and intra-phase circulating currents—degrades power quality, reduces efficiency, and may even lead to system collapse. This work proposes a compound suppression strategy of phase circulation (CSSPC) based on sliding mode control (SMC) to effectively mitigate these circulating currents in low-voltage microgrid parallel inverter systems. We first analyze the generation mechanism of phase circulation and develop separate models for inter-phase and intra-phase circulations. Then, a robust droop SMC controller is designed to suppress inter-phase circulation by improving virtual impedance droop control (VIDC) in terms of bus voltage response, droop loop output accuracy, and adaptive virtual reactance regulation. For intra-phase circulation, a zero-sequence voltage SMC suppressor is introduced to dynamically adjust the zero-vector action time of space vector pulse width modulation (SVPWM), thereby eliminating zero-sequence voltages. Simulation results demonstrate that the proposed CSSPC strategy reduces the inter-phase and intra-phase circulation coefficients to below 1.49% and 0.72%, respectively, significantly outperforming traditional VIDC methods.
1. Introduction
The integration of renewable energy sources into low-voltage microgrids has accelerated the adoption of various types of solar inverters. Among these, three-phase inverters are essential for converting DC power from photovoltaic panels into AC power suitable for grid connection. To satisfy increasing power demands, parallel operation of multiple inverters has become a common practice. However, this configuration introduces circulating currents between phases and within phases, known as phase circulation. These currents not only reduce system efficiency but also distort output waveforms and threaten overall stability. Traditional suppression methods, such as droop control and virtual impedance techniques, often suffer from slow dynamic response and sensitivity to parameter mismatch. Inspired by the strong robustness and fast response of sliding mode control (SMC), we propose a composite control strategy that addresses both inter-phase and intra-phase circulations. Our approach integrates a robust droop SMC controller for power sharing and a zero-sequence voltage SMC suppressor for nullifying zero-sequence paths. This paper details the modeling, design, and validation of the CSSPC strategy, with emphasis on its applicability to different types of solar inverters operating in parallel.
2. Analysis of Phase Circulation in Parallel Inverter Systems
To effectively suppress phase circulation, it is necessary to first establish mathematical models for both inter-phase and intra-phase circulating currents. Consider a typical parallel three-phase inverter system consisting of two inverters (m=1,2) sharing a common DC bus and feeding a balanced load through line impedances.
2.1 Inter-Phase Circulation Model
Assuming balanced loads, each inverter can be represented as an AC voltage source with internal impedance. The inter-phase circulating current between two inverters is given by:
$$ I_c = \frac{\dot{U}_1 – \dot{U}_2}{Z_{o,1} + Z_{o,2}} = \frac{\Delta \dot{U}}{Z_{o,1} + Z_{o,2}} $$
where $\dot{U}_m$ is the no-load output voltage of inverter m, and $Z_{o,m}$ is the sum of its equivalent output impedance and line impedance. The circulating current for each inverter can be expressed as:
$$ I_{c,m} = I_{o,m} – k_m I_o $$
Here, $k_m = S_m / \sum S_m$ is the capacity ratio, and $I_o$ is the total load current. To eliminate inter-phase circulation, accurate load power sharing must be achieved, i.e., $P_m = k_m P_L$ and $Q_m = k_m Q_L$.
2.2 Intra-Phase Circulation Model
Intra-phase circulation arises due to asynchronous switching of corresponding phase legs across parallel inverters. This creates a zero-sequence voltage $u_z$ that drives a circulating current $i_z$ through the phase legs. The dynamic equation in the Laplace domain is:
$$ i_z(s) = \frac{u_{z,1}(s) – u_{z,2}(s)}{\sum_{m=1}^2 L_{e,km} s + \sum_{m=1}^2 R_{l,km}} $$
where $L_{e,km} = L_{f,km1} + L_{f,km2} + L_{l,km}$ and $R_{l,km}$ is the line resistance. Suppressing intra-phase circulation requires eliminating the zero-sequence voltage difference between inverters.
3. Proposed CSSPC Strategy
The CSSPC strategy comprises two main components: a robust droop SMC controller for inter-phase circulation and a zero-sequence voltage SMC suppressor for intra-phase circulation. The controller parameters are listed in Table 1.
| Parameter | Value | Parameter | Value |
|---|---|---|---|
| c_{U,1} | 10 | c_{E,2} | 0.001 |
| c_{U,2} | 0.1 | ε_E | 1 |
| ε_U | 0.5 | k_E | 10 |
| k_U | 1 | c_{f,1} | 300 |
| c_{E,1} | 0.001 | c_{f,2} | 500 |
| ε_f | 1 | c_{v,2} | 0.1 |
| k_f | 10 | ε_v | 0.001 |
| c_{v,1} | 5 | k_v | 5 |
| c_{z,1} | 0.1 | c_{z,2} | 10 |
| ε_z | 0.01 | k_z | 0.1 |
3.1 Robust Droop SMC Controller for Inter-Phase Circulation
Traditional VIDC methods suffer from limited robustness and slow response. We design a cascaded robust droop SMC controller that improves four aspects: bus voltage tracking, Q-U loop voltage response, P-f loop frequency accuracy, and adaptive virtual reactance. The sliding surfaces and control laws are:
AC bus voltage follower:
$$ S_U = c_{U,1} x_U + \dot{x}_U + c_{U,2} \int x_U dt, \quad u_U = -\text{sgn}(S_U) $$
$$ \dot{S}_U = -\varepsilon_U \text{sgn}(S_U) – k_U S_U $$
Q-U loop voltage response:
$$ S_E = c_{E,1} x_E + \dot{x}_E + c_{E,2} \int x_E dt, \quad u_E = -\text{sgn}(S_E) $$
$$ \dot{S}_E = -\varepsilon_E \text{sgn}(S_E) – k_E S_E |S_E| $$
P-f loop frequency response:
$$ S_f = c_{f,1} x_f + \dot{x}_f + c_{f,2} \int x_f dt, \quad u_f = -\text{sgn}(S_f) $$
$$ \dot{S}_f = -\varepsilon_f \text{sgn}(S_f) – k_f S_f $$
Adaptive virtual reactance regulator:
$$ S_v = c_{v,1} x_v + \dot{x}_v + c_{v,2} \int x_v dt, \quad u_v = -\text{sgn}(S_v) $$
$$ \dot{S}_v = -\varepsilon_v \text{sgn}(S_v) – k_v S_v $$
Stability is verified via Lyapunov functions. The resulting Q-U control equation with virtual reactance becomes:
$$ U_m(s) = \left( c_{E,1} + \frac{c_{E,2}}{s} \right) \left[ \left( c_{E,1} + \frac{c_{E,2}}{s} \right) (U_s(s) – U_N(s)) – (N_m + N_{v,m}(s)) Q_m(s) + N_m Q_{N,m}(s) \right] $$
Small-signal analysis yields the characteristic equation:
$$ a s^4 \tilde{\theta}_m + b s^3 \tilde{\theta}_m + c s^2 \tilde{\theta}_m + d s \tilde{\theta}_m + e = 0 $$
with coefficients defined in the original work. The root locus analysis shows that proper selection of parameters (e.g., $c_{f,1}$ large, $c_{E,2}$ small) ensures fast convergence and stability.
3.2 Zero-Sequence Voltage SMC Suppressor for Intra-Phase Circulation
To suppress intra-phase circulation, we introduce a regulation factor $k_m$ into the SVPWM scheme to adjust the zero-vector duration. The zero-sequence duty cycle is expressed as:
$$ d_{z,m} = d_{1m} + 2 d_{2m} + \frac{3 d_{0m}}{2} – 6 k_m $$
The sliding surface for intra-phase circulation is defined on the actual circulating current $i_z$:
$$ S_z = c_{z,1} i_z + \dot{i}_z + c_{z,2} \int i_z dt, \quad u_z = -\text{sgn}(S_z) $$
$$ \dot{S}_z = -\varepsilon_z \text{sgn}(S_z) – k_z S_z $$
By dynamically updating $k_m$ within $[-d_{0m}/4, d_{0m}/4]$, the zero-sequence voltage difference is nullified, thereby suppressing the intra-phase circulating current.
4. Simulation Validation
Simulations were performed using the system parameters listed in Table 2 for two parallel three-phase inverters. The performance of the proposed CSSPC strategy was compared with the traditional VIDC method under varying load conditions.
| Parameter | Value | Parameter | Value |
|---|---|---|---|
| DC input voltage $U_{dc}$ | 700 V | Line resistance $R_l$ | 0.202 Ω |
| Filter capacitor $C_{f,km}$ | 100 μF | Line inductance $L_l$ | 1.471 mH |
| Primary inductor $L_{f,k1m}$ | 8 mH | Rated AC voltage $U_N$ | 311 V |
| Secondary inductor $L_{f,k2m}$ | 6 mH | Rated frequency $f_N$ | 50 Hz |
| Initial virtual reactance $X_{v,m}(0)$ | 0.314 Ω | P-f droop coefficient $M_m$ | 1×10^{-5} |
The load sequence was: 0–0.15 s: $P_L=8$ kW, $Q_L=800$ var; 0.15–0.3 s: $P_L=4$ kW, $Q_L=400$ var; after 0.3 s: rated load (6 kW, 600 var). Simulation results are summarized in Table 3.
| Signal | Settling Time (s) | Overshoot (%) | Response Time (s) | Steady-State Error | Circulation Coefficient (%) |
|---|---|---|---|---|---|
| $P_m$ (VIDC) | 0.036 | 8.374 | 0.034 | 129.214 W | — |
| $P_m$ (CSSPC) | 0.012 | 6.561 | 0.014 | 19.671 W | — |
| $Q_m$ (VIDC) | 0.054 | 77.993 | 0.019 | 40.475 var | — |
| $Q_m$ (CSSPC) | 0.015 | 39.373 | 0.013 | 25.362 var | — |
| $i_c$ (VIDC) | — | 15.408 | — | 0.984 A | 7.69 |
| $i_c$ (CSSPC) | — | 13.784 | — | 0.191 A | 1.49 |
| $i_{z}$ (VIDC) | — | 10.956 | — | 0.782 A | 6.11 |
| $i_{z}$ (CSSPC) | — | 9.121 | — | 0.093 A | 0.72 |
As shown, the CSSPC strategy achieves faster settling times, lower overshoot, reduced steady-state errors for both active and reactive power, and significantly lower circulating currents. The inter-phase circulation coefficient is reduced from 7.69% to 1.49%, and the intra-phase circulation coefficient from 6.11% to 0.72%, well within the industry standard of 5%.
The proposed CSSPC demonstrates strong robustness and fast dynamic response, making it suitable for various types of solar inverters in low-voltage microgrids. The combination of SMC-based droop control and zero-sequence suppression effectively addresses the phase circulation problem without requiring complex system identification.
5. Conclusion
This paper presents a compound suppression strategy of phase circulation for low-voltage microgrid parallel inverter systems. By integrating sliding mode control with virtual impedance droop control and zero-sequence voltage regulation, the CSSPC strategy achieves superior performance in both inter-phase and intra-phase circulation suppression. The robust droop SMC controller improves power sharing accuracy and dynamic response, while the zero-sequence voltage SMC suppressor adaptively adjusts the SVPWM zero-vector durations to eliminate intra-phase currents. Simulation results confirm that the strategy reduces inter-phase circulation to 1.49% and intra-phase circulation to 0.72%, significantly outperforming traditional VIDC methods. The approach is applicable to various types of solar inverters, ensuring high-quality power delivery and system stability in distributed energy systems. Future work will extend the strategy to unbalanced load conditions and communication-free implementations for enhanced scalability.