The global transition towards renewable energy has positioned photovoltaic (PV) power generation as a cornerstone of the future power mix. As its penetration increases, the imperative for achieving grid parity—where the cost of solar electricity equals or falls below that of conventional sources—becomes ever more urgent. A critical pathway to reducing the Levelized Cost of Energy (LCOE) for utility-scale solar plants lies in increasing system voltage. Migrating from traditional 1000V to 1500V DC architectures significantly reduces electrical losses and the cost of cabling within the PV plant. This voltage transition, however, presents substantial challenges for the core power conversion unit: the grid-tied solar inverter.
Conventional two-level and three-level T-type inverter topologies, while prevalent, face significant drawbacks at 1500V DC input. The blocking voltage stress on their semiconductor switches rises proportionally, often necessitating the use of higher-voltage-rated insulated-gate bipolar transistors (IGBTs). These devices typically exhibit higher switching losses, which compromises conversion efficiency and limits the achievable switching frequency, thereby constraining power density. To address these limitations, multilevel inverter topologies have emerged as a superior solution for high-voltage applications. By synthesizing a staircase voltage waveform from multiple DC voltage levels, they drastically reduce the voltage stress on individual switches, enabling the use of faster, more efficient devices like MOSFETs.
Among multilevel candidates for 1500V solar inverters, the Active Neutral-Point Clamped Five-Level (ANPC-5L) inverter offers a compelling balance. Compared to Diode-Clamped (NPC) or Flying Capacitor (FC) topologies, the ANPC-5L requires fewer passive components, simplifies voltage balancing control, and offers higher reliability and power density. Its switches withstand only a quarter of the DC bus voltage (e.g., 375V for a 1500V system), making low-loss 600V-650V super-junction MOSFETs a viable option. However, as power ratings increase, conduction losses from the MOSFETs’ on-state resistance become a limiting factor for efficiency. Parallel connection of devices or bridge arms is a standard method to share current and reduce conduction losses. Interleaving multiple converter cells not only distributes current but, with precise modulation, can also enhance the effective switching frequency seen by the output filter, enabling further size reduction of passive components and a leap in power density.
This article presents a novel Interleaved Active Neutral-Point Clamped Nine-Level (I-ANPC-9L) inverter topology, specifically engineered for high-power-density, high-efficiency 1500V solar inverter applications. The proposed system interleaves two ANPC-5L sub-modules per phase through coupled inductors, effectively generating a nine-level output voltage. We delve into the operational principles, introduce a specialized modulation strategy that concurrently manages flying capacitor voltage balancing and mitigates inter-module circulating currents, and provide a comprehensive evaluation of its efficiency and power density potential compared to state-of-the-art alternatives.
Topological Foundation: The ANPC-5L Building Block
The proposed architecture is constructed from ANPC-5L sub-modules. A single-phase leg of this topology is depicted in Figure 1. It comprises eight power switches (S1–S8), a flying capacitor (Cf), and two series-connected DC-link capacitors (Cup, Cdown) that establish a neutral point (O). The DC bus voltage is defined as Vdc, and the voltage across each DC-link capacitor, as well as the target voltage for Cf, is E = Vdc/4.
The topology can synthesize five distinct output voltage levels with respect to the neutral point: +2E, +E, 0, -E, -2E. The key to its operation is the strategic use of redundant switching states. For a given output level and current direction, multiple valid switch combinations exist, which either charge, discharge, or bypass the flying capacitor. This redundancy is the foundation for natural or actively controlled flying capacitor voltage regulation. Table 1 summarizes the primary safe switching states for the positive half-cycle of the output current (Io > 0).
| State | Output Vo | S1 S2 S3 S4 S5 S6 S7 S8 | Flying Cap. (Cf) Action |
|---|---|---|---|
| V8 | +2E | 1 0 1 0 1 0 1 0 | Bypassed |
| V7-1 | +E | 1 0 0 1 1 0 1 0 | Discharging |
| V7-2 | +E | 1 0 0 1 0 0 1 0 | Discharging |
| V6 | +E | 0 1 1 0 1 0 1 0 | Charging |
| V5-1 | 0 | 0 1 0 1 1 0 1 0 | Bypassed |
| V3 | -E | 1 0 0 1 0 1 0 1 | Charging |
A critical aspect of modulation is ensuring safe commutation, particularly during zero-crossings of the output voltage where the current path must be reconfigured. A state-machine-based modulation strategy is employed. This strategy ensures that during any transition, only a minimal number of switches change state, and all intermediate states are within the safe operating area, preventing excessive voltage stress. For example, transitioning from state V5-1 (output 0) to V2-1 (output -E) involves a sequence through intermediate states that safely commutate the current from the upper to the lower half of the bridge. This approach eliminates hazardous voltage spikes that can occur during dead time in conventional methods. Furthermore, it results in switches S5–S8 operating at the fundamental grid frequency (50/60 Hz), while only S1–S4 switch at the high PWM frequency, minimizing overall switching losses—a crucial advantage for solar inverters.
Proposed Interleaved Nine-Level Topology and Modulation
The proposed three-phase I-ANPC-9L inverter is constructed by paralleling two ANPC-5L sub-modules per phase through a coupled inductor, as shown in the system diagram. The outputs of the two sub-modules, Va1 and Va2 for phase A, are connected to the coupled inductor, whose secondary sides are tied together to form the phase output Vo. The inductors are connected with opposite polarity (negative coupling) to suppress high-frequency circulating currents.
The operation can be understood through a common-mode and differential-mode analysis. Let L be the self-inductance of each winding and M be the mutual inductance. The voltages and currents relate as follows:
$$V_{a1} – V_o = L \frac{d i_1}{dt} – M \frac{d i_2}{dt}$$
$$V_{a2} – V_o = L \frac{d i_2}{dt} – M \frac{d i_1}{dt}$$
By adding and subtracting these equations, we derive the equivalent circuit model. The common-mode dynamics, governing the average current (i1+i2)/2 and the average voltage (Va1+Va2)/2, see an equivalent inductance of (L – M)/2. The differential-mode dynamics, governing the circulating current icir = (i1 – i2)/2 and the voltage difference (Va1 – Va2)/2, see an equivalent inductance of (L + M)/2.
The core innovation in modulation lies in the phase shift between the carriers of the two sub-modules. Each ANPC-5L sub-module is modulated using Phase Disposition Sinusoidal Pulse Width Modulation (PD-SPWM), where four triangular carriers are vertically aligned in phase. For the interleaved system, the carrier set for the second sub-module is shifted by 180° relative to the first.
The harmonic benefits of this interleaving are profound. The Fourier series representation of a PD-SPWM modulated ANPC-5L output voltage contains harmonics centered around multiples of the switching frequency fsw. When two such waveforms Va1(t) and Va2(t) with a carrier phase shift θ are combined via the coupled inductor, their common-mode component (which forms the output Vo) experiences harmonic cancellation. For a phase shift of θ = 180°, the dominant first carrier-group harmonics (around fsw) are canceled in the output. The lowest significant harmonic cluster in the output voltage appears around 2fsw. This effectively doubles the apparent switching frequency seen by the output filter.
The output voltage of the combined system is a nine-level waveform: ±4E, ±3E, ±2E, ±E, 0. This is achieved not by a single modulator with eight carriers (as in a classic nine-level converter), but by the interleaved sum of two five-level modulators. The Total Harmonic Distortion (THD) of the line-to-line voltage is significantly lower than that of a single ANPC-5L and is comparable to advanced modulation schemes for monolithic nine-level topologies, but with a more favorable loss distribution.
Circulating Current Analysis and Suppression Strategy
Interleaving inevitably introduces a differential-mode voltage, Vdiff = (Va1 – Va2)/2, which drives a circulating current icir between the sub-modules. Under ideal conditions with perfect symmetry and 180° interleaving, Vdiff is a pure high-frequency AC waveform with zero average over a switching cycle, resulting in a bounded, high-frequency icir with no DC offset. The coupled inductor, with its high differential-mode inductance (L+M)/2, is designed to limit this high-frequency current to a safe, small value.
However, practical non-idealities—such as mismatches in semiconductor voltage drops, timing delays, and imbalances in the DC-link or flying capacitor voltages—can introduce low-frequency components into Vdiff. This can cause a DC or low-frequency drift in icir, potentially saturating the coupled inductor and leading to overcurrent faults. Therefore, active suppression is essential for reliability.
A simple yet effective closed-loop suppression strategy is implemented. The circulating current icir is measured or estimated. A Proportional-Integral (PI) controller processes the error between the measured icir and its reference (typically zero). The controller’s output is a small voltage correction term, ΔV. This term is added to the modulation reference of one sub-module and subtracted from the reference of the other:
$$V_{ref1} = V_{ref} + \Delta V$$
$$V_{ref2} = V_{ref} – \Delta V$$
Since the corrections are equal and opposite, the common-mode voltage (and thus the final output voltage Vo) remains unchanged. However, a deliberate differential-mode voltage is injected to counteract the one caused by asymmetries, forcing icir back to zero. This decoupled control ensures robust operation without compromising the quality of the grid current.
Efficiency and Power Density Benchmarking
To quantitatively assess the merits of the I-ANPC-9L for 1500V solar inverters, a loss analysis is performed against key competitors: the standard ANPC-5L, a Silicon Carbide (SiC) MOSFET-based NPC three-level (NPC-3L) inverter, and a monolithic HANPC nine-level inverter. A system rating of 20 kW with a 1500 Vdc input and 380 Vac output is assumed.
Device Selection:
- I-ANPC-9L & ANPC-5L: The high-frequency switches (S1-S4, 375V stress) use 650V CoolMOS™ (IPW60R024CFD7, Rds(on)=24mΩ). The low-frequency switches (S5-S8, 750V stress) use 1200V IGBTs (IKQ75N120CT2).
- NPC-3L: Uses 1200V SiC MOSFETs (IMZ120R030M1H) and SiC diodes, enabling high switching frequency (20-100 kHz).
- HANPC-9L: Requires many 650V switches; uses the same CoolMOS™ as above.
The total loss Ptotal for each topology is calculated as the sum of conduction loss (Pcon) and switching loss (Psw). For the ANPC-based topologies, conduction loss considers the on-state resistance of the MOSFETs and the saturation voltage of the IGBTs in the current path for each output level. Switching loss is calculated for the high-frequency MOSFETs based on their switching energy. The losses for the I-ANPC-9L are calculated for one sub-module carrying half the current and then doubled.
The results are summarized in Table 2. The analytical comparison reveals distinct advantages for the proposed topology in the target application.
| Topology | Switching Frequency | Estimated Total Loss | Key Advantages & Trade-offs |
|---|---|---|---|
| ANPC-5L | 20 kHz | ~320 W | Simple control, low switch stress. Higher filter needs limit power density. |
| I-ANPC-9L (Proposed) | 20 kHz | ~300 W | Effective fsw=40kHz, smallest filter, high density. Excellent efficiency. |
| NPC-3L (SiC) | 50 kHz | ~350 W | Good density at high fsw, but SiC cost is high. Efficiency lower at mid-frequencies. |
| HANPC-9L | 20 kHz | ~340 W | Monolithic nine-level output. Higher conduction loss than I-ANPC due to more devices in current path. |
Power Density Implications: The doubled effective switching frequency of the I-ANPC-9L is its most significant advantage for power density. The inductance Lf of an output filter is inversely proportional to the switching frequency for a given current ripple requirement: $$L_f \propto \frac{1}{f_{sw}}$$. With an effective fsw of 40 kHz versus 20 kHz for a standalone ANPC-5L, the filter inductance can be theoretically halved. In many cases, the grid-side line inductance may suffice, potentially eliminating the need for a dedicated inverter-side filter inductor entirely. The coupled inductor, handling only high-frequency ripple current, can also be made compact. This synergistic effect makes the I-ANPC-9L exceptionally suitable for compact, high-power string solar inverters.
Experimental Validation
A 1 kW, 400 Vdc input laboratory prototype of a single-phase I-ANPC-9L system was built to validate the principles. The system uses DSP+CPLD control to implement the state-machine modulation and circulating current control.
Waveform and Harmonic Performance: The measured output voltages of the two ANPC-5L sub-modules (Va1, Va2) show the characteristic five-level waveforms shifted by 180°. The final output voltage Vo clearly shows a nine-level staircase. Spectral analysis confirms the theoretical prediction: the individual sub-module output has a dominant harmonic cluster at the switching frequency (20 kHz), while the final interleaved output has this cluster heavily suppressed, with the first major cluster appearing at 40 kHz. The THD of the interleaved output voltage was measured to be 15.14%, significantly lower than the 44.01% THD of a single sub-module’s voltage, validating the harmonic cancellation benefit.
Flying Capacitor and Circulating Current Control: The flying capacitor voltages in both sub-modules were maintained stable around their reference (Vdc/4), confirming the effectiveness of the redundant state selection algorithm. The circulating current was measured with and without the proposed suppression controller. Without control, a low-frequency drift component was observable. With the PI-based controller active, the circulating current was regulated to a near-zero average value, exhibiting only the expected high-frequency ripple, thus demonstrating the robustness of the approach.
Efficiency Measurement: While the full-scale 1500V, 20kW efficiency could not be directly tested on the small prototype, a loss-model-based projection aligned with the analysis in Table 2 indicates a peak efficiency exceeding 98.5% is achievable for the proposed solar inverter at rated power, competing favorably with the best-in-class solutions.
Conclusion
The transition to 1500V PV systems is a vital step towards grid parity, demanding innovative inverter solutions that optimize efficiency, reliability, and power density simultaneously. The Interleaved Active Neutral-Point Clamped Nine-Level (I-ANPC-9L) inverter topology presented herein directly addresses these demands. By intelligently paralleling two optimized ANPC-5L sub-modules with 180° phase-shifted modulation, it achieves a high-quality nine-level output waveform with an effective switching frequency double that of its sub-modules.
The key contributions of this work include: 1) A systematic modulation strategy for the ANPC-5L that ensures safe commutation and natural flying capacitor balance; 2) The application of interleaving to this topology to create a virtual nine-level output with superior harmonic spectrum; 3) A simple yet effective decoupled control method to suppress low-frequency circulating currents induced by practical asymmetries, ensuring operational stability; and 4) A comprehensive benchmarking analysis demonstrating the topology’s superior balance of efficiency and power density for 1500V applications compared to ANPC-5L, SiC-based NPC-3L, and monolithic HANPC-9L alternatives.
Experimental results from a down-scaled prototype confirm the operational principles, harmonic benefits, and the effectiveness of the control strategies. The I-ANPC-9L topology therefore stands out as a highly promising candidate for the next generation of high-power, compact, and efficient string solar inverters, capable of leveraging the full cost-saving potential of 1500V photovoltaic systems.