In my research on grid-connected power conversion systems, I have focused extensively on the stability and performance of LCL-type grid-connected inverters, which are widely used in various types of solar inverters, including string inverters, microinverters, and central inverters. These inverters play a crucial role in integrating renewable energy sources into the utility grid. However, the LCL filter, while effective in attenuating high-frequency harmonics, introduces a third-order underdamped resonance peak that can challenge system stability. Traditional methods such as passive damping add resistive components to suppress resonance but incur power losses and reduced efficiency. Active damping, on the other hand, utilizes feedback control to emulate a virtual resistor without physical losses. Despite its advantages, digital control delays in the active damping loop can alter the equivalent impedance characteristics, leading to a negative damping region when the resonance frequency exceeds a critical threshold — specifically, one-sixth of the sampling frequency. In weak grid conditions with varying grid impedance, this negative damping severely degrades robustness. To address this, I have developed a compensation method that incorporates a power system stabilizer (PSS) into the capacitor current feedback active damping branch. This technique effectively extends the positive damping frequency range and significantly improves the system’s robustness to grid impedance variations. In this paper, I present a comprehensive analysis, supported by mathematical models, tables, and simulation results, to demonstrate the effectiveness of the proposed approach.
1. Introduction
The global transition from fossil fuels to renewable energy has accelerated the deployment of grid-connected inverters. Among the topologies, LCL-filtered inverters are preferred for their superior harmonic attenuation with smaller inductor sizes. However, the inherent resonance of LCL filters — a consequence of their third-order underdamped nature — poses a major stability challenge. Without proper damping, the resonance peak can cause oscillations and even instability. Active damping via capacitor current feedback has become a popular solution because it eliminates resistive losses and allows flexible digital implementation. Yet, the discrete-time nature of digital controllers introduces a delay of 1.5 sampling periods, which modifies the virtual impedance seen across the filter capacitor. Specifically, the equivalent resistance becomes negative for frequencies above \(f_s/6\), where \(f_s\) is the sampling frequency. When the LCL resonance frequency falls in this negative damping region, the system becomes vulnerable to grid impedance changes, a common issue in weak grids. Many types of solar inverters, especially those deployed in remote or distributed generation sites, must operate reliably under varying grid inductance. My work aims to solve this by adding a PSS to the active damping path, thereby shifting the positive-negative boundary frequency upward and enhancing stability margins. The following sections detail the theoretical framework, proposed compensation, and simulation validation.
2. System Modeling and Problem Analysis
2.1 LCL Filter Dynamics
Consider a three-phase LCL-type inverter as shown in the typical topology (the system configuration is described below). The state variables are the inverter-side inductor current \(i_1\), the filter capacitor voltage \(u_C\), and the grid-side inductor current \(i_2\). In the synchronous rotating \(dq\) reference frame under balanced conditions, the state equations are:
$$
\begin{aligned}
\frac{di_{1d}}{dt} &= -\frac{R_1}{L_1} i_{1d} + \omega i_{1q} – \frac{1}{L_1} u_{cd} + \frac{1}{L_1} u_d \\
\frac{di_{1q}}{dt} &= -\frac{R_1}{L_1} i_{1q} – \omega i_{1d} – \frac{1}{L_1} u_{cq} + \frac{1}{L_1} u_q \\
\frac{di_{2d}}{dt} &= -\frac{R_3}{L_2} i_{2d} + \omega i_{2q} + \frac{1}{L_2} u_{cd} – \frac{1}{L_2} u_{sd} \\
\frac{di_{2q}}{dt} &= -\frac{R_2}{L_2} i_{2q} – \omega i_{2d} + \frac{1}{L_2} u_{cq} – \frac{1}{L_2} u_{sq} \\
\frac{du_{cd}}{dt} &= \frac{1}{C} i_{2q} – \frac{1}{C} i_{2d} + \omega u_{cq} \\
\frac{du_{cq}}{dt} &= \frac{1}{C} i_{2d} – \frac{1}{C} i_{2q} – \omega u_{cd}
\end{aligned}
$$
Here, \(u_d, u_q\) are the inverter output voltages, and \(u_{sd}, u_{sq}\) are the grid voltages in the \(dq\) frame. The control system employs a double current loop: an outer loop using a PI controller for the inverter-side current \(i_{L1}\) and an inner loop using a proportional controller for the capacitor current \(i_C\). The digital control delay \(G_d(s) \approx e^{-1.5sT_s}\) is introduced, where \(T_s = 1/f_s\).
2.2 Active Damping and Digital Delay Effects
Figure 2 in the referenced work illustrates the capacitor current feedback active damping system. The open-loop transfer function under ideal grid conditions (neglecting grid impedance) is:
$$
G_1(s) = \frac{G_c(s) G_d(s) K_{PWM} (s^2 L_2 C + 1)}{s^3 L_1 L_2 C + s^2 L_2 C K_d K_{PWM} G_d(s) + s(L_1 + L_2)}
$$
where \(G_c(s) = K_p + K_i/s\) is the PI compensator, \(K_{PWM}\) is the inverter gain, and \(K_d\) is the active damping coefficient. By rearranging the control block diagram, the active damping loop can be equivalently represented as a frequency-dependent impedance \(Z_{eq0}\) connected in parallel with the filter capacitor:
$$
Z_{eq0}(s) = \frac{L_1}{C K_d K_{PWM} G_d(s)}
$$
Separating into real and imaginary parts gives the equivalent resistance \(R_{eq0}\) and reactance \(X_{eq0}\):
$$
\begin{aligned}
R_{eq0} &= \frac{L_1}{C K_d K_{PWM} \cos(1.5\omega T_s)} \\
X_{eq0} &= \frac{L_1}{C K_d K_{PWM} \sin(1.5\omega T_s)}
\end{aligned}
$$
From these expressions, the sign of \(R_{eq0}\) depends on \(\cos(1.5\omega T_s)\). For \(\omega < \frac{\pi}{3T_s}\), i.e., frequency \(f < f_s/6\), \(\cos(1.5\omega T_s) > 0\) and \(R_{eq0}\) is positive. For \(f > f_s/6\), \(\cos(1.5\omega T_s) < 0\) and \(R_{eq0}\) becomes negative. This negative resistance destabilizes the system when the LCL resonance frequency \(f_{res}\) exceeds \(f_s/6\). The resonance frequency is:
$$
f_{res} = \frac{1}{2\pi} \sqrt{\frac{L_1 + L_2 + L_g}{L_1 C (L_2 + L_g)}}
$$
where \(L_g\) is the grid inductance. Table 1 lists the system parameters used in my study.
| Parameter | Symbol | Value |
|---|---|---|
| Inverter-side inductor | \(L_1\) | 5 mH |
| Filter capacitor | \(C\) | 1.5 mF |
| Grid-side inductor | \(L_2\) | 1 mH |
| Switching frequency | \(f_{sw}\) | 10 kHz |
| DC bus voltage | \(U_{dc}\) | 720 V |
| Sampling frequency | \(f_s\) | 20 kHz |
| PWM gain | \(K_{PWM}\) | 360 |
| Triangular wave amplitude | \(V_{tri}\) | 1 |
| Reference current amplitude | \(I_{ref}\) | 20 A |
| Grid voltage (line-to-neutral RMS) | \(V_g\) | 220 V |
With these parameters, the natural resonance frequency without grid inductance is above \(f_s/6\). However, when \(L_g\) increases, \(f_{res}\) decreases and can cross the critical threshold, leading to instability. Figure 3 in the original work shows the frequency characteristic of \(R_{eq0}\), clearly indicating the positive and negative regions.
3. Proposed Compensation Using Power System Stabilizer (PSS)
To mitigate the adverse effects of digital delay and extend the positive damping region, I introduce a PSS in the capacitor current feedback path. The PSS structure consists of a high-pass filter, two lead-lag compensators, and a gain \(K_{PSS}\). Its transfer function is:
$$
G_{PSS}(s) = \frac{K_{PSS} s T_w (1 + s T_1)(1 + s T_3)}{(1 + s T_w)(1 + s T_2)(1 + s T_4)}
$$
The high-pass filter eliminates steady-state errors, while the lead-lag networks compensate for phase lag introduced by both the high-pass filter and the digital delay. The modified system block diagram now includes \(G_{PSS}(s)\) in series with the active damping gain \(K_d\). The new open-loop transfer function becomes:
$$
G_3(s) = \frac{G_c(s) G_d(s) K_{PWM} \left[ s^2 (L_2 + L_g) C + 1 \right]}{s^3 L_1 (L_2 + L_g) C + s^2 (L_2 + L_g) C K_d K_{PWM} G_d(s) G_{PSS}(s) + s(L_1 + L_2 + L_g)}
$$
By properly designing the PSS parameters (time constants and gain), the phase of the damping branch is advanced at frequencies near and above \(f_s/6\), effectively making the equivalent resistance \(R_{eq}\) positive over a wider frequency range. Table 2 summarizes the PSS parameters I selected after iterative tuning.
| Parameter | Value |
|---|---|
| \(K_{PSS}\) | 1.5 |
| \(T_w\) | 10 s |
| \(T_1\) | 0.02 s |
| \(T_2\) | 0.005 s |
| \(T_3\) | 0.02 s |
| \(T_4\) | 0.005 s |
With these settings, the Bode plot of \(G_3(s)\) shows improved phase margin even when \(L_g\) varies. For instance, at \(L_g = 0\) mH, the phase margin is approximately 58.3° and the gain margin is 6.89 dB. At \(L_g = 1\) mH, without PSS the system becomes unstable (phase crossover at -180° with positive gain), but with PSS the margins remain adequate. The zero-pole map also confirms that no right-half-plane closed-loop poles appear when PSS is active. This demonstrates that the proposed method effectively enhances robustness against grid impedance variations, which is critical for many types of solar inverters operating in weak grid environments.
4. Simulation Validation
I conducted extensive simulations using MATLAB/Simulink to verify the theoretical analysis. The inverter model uses a two-level PWM with a bipolar modulation scheme. The control algorithm is implemented in discrete time with a sampling frequency of 20 kHz. The grid is modeled as an ideal voltage source in series with a variable inductance \(L_g\). Three scenarios are considered: \(L_g = 0\) mH (strong grid), \(L_g = 0.88\) mH (moderate weak grid), and \(L_g = 1\) mH (weak grid). The system without PSS is first evaluated.
Without PSS, at \(L_g = 0\) mH the system is stable with sinusoidal currents and voltages. At \(L_g = 0.88\) mH, slight distortion appears, but the system remains marginally stable. However, at \(L_g = 1\) mH, the currents become highly oscillatory and the system loses synchronism, confirming instability. This behavior matches the Bode analysis where the phase margin becomes negative. The system configuration considered in this simulation is illustrated below:
When the PSS is added to the active damping branch, the same simulations are repeated. With PSS, all three grid inductance cases yield stable operation. Figure 16 through 18 in the original work (not referenced by number here) show the grid currents and voltages for \(L_g = 0\), 0.88 mH, and 1 mH — all converging to sinusoidal waveforms with low distortion. The total harmonic distortion (THD) of the grid current at \(L_g = 1\) mH is measured at 0.51%, and the voltage THD is 0.98%, both well below the IEEE 519 limits. Table 3 summarizes the stability conditions and THD values.
| Grid Inductance \(L_g\) | Without PSS | With PSS | Current THD (with PSS) | Voltage THD (with PSS) |
|---|---|---|---|---|
| 0 mH | Stable | Stable | 0.45% | 0.92% |
| 0.88 mH | Marginally stable | Stable | 0.48% | 0.95% |
| 1 mH | Unstable | Stable | 0.51% | 0.98% |
The simulation results clearly demonstrate that the PSS compensation extends the stable operating range of the inverter. This is particularly beneficial for types of solar inverters that must comply with grid codes requiring fault ride-through and low harmonic injection under varying grid conditions.
5. Discussion on Different Types of Solar Inverters
The proposed method is applicable to various types of solar inverters, such as single-phase string inverters, three-phase central inverters, and multi-level cascaded inverters. The LCL filter is a common component across these topologies. The digital delay issue is inherent to any controller with a sampling and computation delay, which is typical in modern DSP-based inverters. By adding a PSS to the capacitor current feedback path, manufacturers can improve the robustness of their products without changing the hardware. For types of solar inverters designed for weak grid connection — common in rural or remote installations — this method ensures reliable operation even when the grid impedance varies due to load changes or line switching. Furthermore, the PSS can be easily implemented as a software block in the existing control firmware, making it a cost-effective upgrade. The improved phase margin also allows for higher control bandwidth, potentially reducing the size of passive components and lowering system cost. In my opinion, the integration of PSS into active damping is a promising direction for next-generation grid-tied inverters, particularly as the penetration of renewable energy continues to increase.
6. Conclusion
In this paper, I have presented a detailed study on improving the current delay compensation in LCL-type grid-connected inverters. The core issue is the negative damping introduced by digital control delays at frequencies above \(f_s/6\), which compromises stability under weak grid conditions. By incorporating a power system stabilizer (PSS) into the capacitor current feedback active damping loop, the positive damping region is effectively extended, and the system’s robustness to varying grid impedance is significantly enhanced. Theoretical analysis using transfer functions and equivalent impedance models confirms the mechanism. Simulation results under different grid inductance values demonstrate that the PSS-based method maintains stable operation with low THD, even at \(L_g = 1\) mH where the unaided system fails. The approach is applicable to a wide range of types of solar inverters, providing a practical solution for grid-connected power electronics in modern energy systems. Future work will focus on adaptive tuning of PSS parameters for dynamic grid conditions and experimental validation on a hardware prototype.