In modern power electronic systems, the selection of appropriate modulation techniques for three-level inverters is critical in addressing multiple performance metrics such as switching losses, common-mode voltage (CMV), and neutral-point potential balancing. Among various types of solar inverters, the T-type three-level topology has gained wide adoption due to its high efficiency and low harmonic distortion. However, traditional space vector pulse width modulation (SVPWM) often leads to large CMV and significant switching losses. To overcome these issues, we propose a hybrid discontinuous pulse width modulation (DPWM) strategy based on an improved carrier implementation. This strategy not only reduces CMV and its ripple but also provides fast neutral-point balancing without sacrificing efficiency.
The primary contributions of this work are threefold. First, we analyze the CMV characteristics of different switching states in three-level inverters and select a low-CMV DPWM (referred to as DPWMA) for normal operation. Second, we introduce a hybrid control scheme that switches to maximum or minimum DPWM (DPWMMAX or DPWMMIN) when neutral-point deviation exceeds a threshold, thus achieving rapid balancing. Third, we propose an improved carrier assignment method that reduces the CMV ripple from \(V_{dc}/3\) to \(V_{dc}/6\) for all employed DPWM modes. The effectiveness of the proposed method is validated through simulations and experiments, demonstrating its suitability for grid-connected photovoltaic systems and other types of solar inverters.
Analysis of Common-Mode Voltage and Discontinuous PWM
In a three-level T-type inverter, each phase can output three voltage levels: \(P\) (\(+V_{dc}/2\)), \(O\) (0), and \(N\) (\(-V_{dc}/2\)). The CMV at the inverter output is defined as
$$V_{CM} = \frac{V_{ao}+V_{bo}+V_{co}}{3}.$$
Table 1 summarizes the CMV magnitudes for all possible switching states. It is evident that vectors with CMV equal to \(\pm V_{dc}/6\) or 0 are desirable for CMV reduction. Among these, DPWMA only utilizes vectors with CMV magnitudes of 0 and \(\pm V_{dc}/6\), thereby limiting the instantaneous CMV to one-sixth of the DC-link voltage.
| CMV Value | Switching States |
|---|---|
| \(-V_{dc}/2\) | \(V_0[NNN]\) |
| \(-V_{dc}/3\) | \(V_{1N}[ONN], V_{3N}[NON], V_{5N}[NNO]\) |
| \(-V_{dc}/6\) | \(V_{2N}[OON], V_{4N}[NOO], V_{6N}[ONO], V_{13}[PNN], V_{15}[NPN], V_{17}[NNP]\) |
| 0 | \(V_0[OOO], V_7[PON], V_8[OPN], V_9[NPO], V_{10}[NOP], V_{11}[ONP], V_{12}[PNO]\) |
| \(+V_{dc}/6\) | \(V_{1P}[POO], V_{3P}[OPO], V_{5P}[OOP], V_{14}[PPN], V_{16}[NPP], V_{18}[PNP]\) |
| \(+V_{dc}/3\) | \(V_{2P}[PPO], V_{4P}[OPP], V_{6P}[POP]\) |
| \(+V_{dc}/2\) | \(V_0[PPP]\) |
Traditional SVPWM employs vectors with higher CMV, while DPWMA clamps one phase to a fixed state (P, O, or N) during each sector, reducing the switching events by one-third. The modulation waveforms for DPWMA are generated by injecting a zero-sequence component given by
$$v_0\big|_{DPWMA} = \min\big[\min(v_{xh}),\,\min(v_{xl})\big],$$
where \(v_{xh}=1-v_x\) for \(v_x>0\) and \(v_{xh}=-v_x\) for \(v_x\leq0\); similarly, \(v_{xl}=v_x\) for \(v_x>0\) and \(v_{xl}=1+v_x\) for \(v_x\leq0\). The resulting clamped phase reduces switching losses, making DPWMA attractive for high-power types of solar inverters.
Proposed Hybrid DPWM for Neutral-Point Balancing
The neutral-point potential (NPP) is defined as
$$V_{np} = \frac{V_{C2} – V_{C1}}{2}.$$
Although DPWMA inherently has a neutral-point balancing capability over a fundamental cycle, it may be insufficient under severe initial imbalance or transient disturbances. To address this, we propose a hybrid scheme that continuously monitors \(V_{np}\). When \(|V_{np}|\) is below a predefined threshold (e.g., 5% of \(V_{dc}\)), the inverter operates in DPWMA mode to maintain low CMV and low switching losses. If the deviation exceeds the threshold, the controller immediately switches to either DPWMMAX (clamping the maximum phase to P) or DPWMMIN (clamping the minimum phase to N), depending on the polarity of the deviation. These two modes draw net current from the neutral point in opposite directions, thus providing the fastest possible balancing action.
The zero-sequence voltages for DPWMMAX and DPWMMIN are:
$$\begin{aligned}
v_0\big|_{DPWMMAX} &= 1 – v_{\max}, \\
v_0\big|_{DPWMMIN} &= -1 – v_{\min},
\end{aligned}$$
where \(v_{\max}\) and \(v_{\min}\) are the maximum and minimum values of the original three-phase modulation waves. Once \(V_{np}\) returns to within the threshold, the system reverts to DPWMA. This hybrid approach ensures that the duration of the high-CMV balancing modes is minimized, thereby preserving the overall CMV suppression benefit.
Improved Carrier Implementation for Ripple Reduction
Conventional carrier-based DPWM uses either concave (downward triangle) or convex (upward triangle) carriers for all phases. However, the original DPWMA implemented with conventional carriers exhibits a CMV ripple of \(V_{dc}/3\) within each switching period, as the switching sequence passes through states having CMV = \(+V_{dc}/6\) and \(-V_{dc}/6\). To reduce this ripple, we propose an improved carrier assignment that varies the carrier type per phase and per sector.
Table 2 summarizes the carrier type selection for each clamping region. The key idea is to force the switching sequence to begin and end with a zero-CMV state (e.g., [PON] or [PNN]) and to avoid traversing both positive and negative \(V_{dc}/6\) states within one period. For regions where one phase is clamped to P or N, the other two phases are assigned opposite carrier types (one concave, one convex), so that their switching transitions occur in opposite directions. This rearrangement reduces the CMV ripple to only \(V_{dc}/6\).
| Clamped Phase | Carrier Type for Phase b | Carrier Type for Phase c |
|---|---|---|
| \(S_a = P\) | Concave | Convex |
| \(S_a = N\) | Convex | Concave |
| \(S_b = P\) | Concave | Convex |
| \(S_b = N\) | Convex | Concave |
| \(S_c = P\) | Concave | Convex |
| \(S_c = N\) | Convex | Concave |
| \(S_x = O\) (any phase) | Use concave carrier when \(v_x>0\), convex carrier when \(v_x<0\) | |
This improved carrier assignment is applied to all three DPWM modes (DPWMA, DPWMMAX, DPWMMIN). As a result, the CMV ripple is uniformly reduced by half, without adding computational burden. The technique is particularly beneficial for types of solar inverters operating at high DC-link voltages, where CMV-related leakage currents and electromagnetic interference are major concerns.
Simulation and Experimental Validation
We conducted both simulation and experimental tests on a 10 kW T-type three-level grid-connected inverter prototype. The system parameters are listed in Table 3. The DC-link voltage was set to 800 V for normal operation and 400 V for balancing experiments to ensure safety. Three modulation strategies were compared: conventional SVPWM, DPWMA with conventional carriers, and the proposed hybrid DPWM with improved carriers.
| Parameter | Value |
|---|---|
| Grid voltage (RMS) | 220 V |
| Grid frequency | 50 Hz |
| Switching frequency | 20 kHz |
| DC-link voltage | 800 V (or 400 V) |
| DC-link capacitance | 2.35 mF each |
| Output power | 10 kW |
| Bridge-side inductor | 2 mH |
| Grid-side inductor | 0.1 mH |
| Filter capacitor | 4.7 μF |
Figure 7 from the original work (not reproduced here) shows that under balanced neutral-point conditions, conventional SVPWM produces a peak CMV of \(V_{dc}/3\), while DPWMA with conventional carriers limits the peak to \(V_{dc}/6\) but exhibits a ripple of \(V_{dc}/3\). The proposed improved carrier DPWMA reduces the ripple to \(V_{dc}/6\), achieving a 50% reduction in CMV ripple compared to conventional DPWMA. The output current THD for the three methods was 1.85%, 1.88%, and 1.70% respectively, indicating that the improved carrier method also slightly improves waveform quality.
The neutral-point balancing performance was evaluated under an initial offset of ±50 V. Without the hybrid scheme, DPWMA alone required more than 200 ms to bring the potential back to zero. With the proposed hybrid DPWM, the system automatically switched to DPWMMIN (for positive offset) or DPWMMAX (for negative offset), and the balancing was completed within 20 ms (one fundamental cycle). During the short balancing period, the CMV ripple was also suppressed by the improved carrier technique, ensuring that the overall CMV profile remained low. These results confirm that the proposed strategy effectively combines low CMV, low switching losses, and fast balancing, making it highly suitable for advanced types of solar inverters.
Conclusion
We have presented a hybrid discontinuous PWM strategy for three-level inverters that simultaneously addresses switching losses, common-mode voltage, and neutral-point balancing. By selecting the low-CMV DPWMA during normal operation and switching to DPWMMAX/DPWMMIN during large neutral-point deviations, the inverter achieves both high efficiency and fast dynamic response. Furthermore, an improved carrier implementation reduces the CMV ripple by half, from \(V_{dc}/3\) to \(V_{dc}/6\), for all DPWM modes. Simulation and experimental results confirm that the proposed method delivers a maximum CMV of only \(V_{dc}/6\) and a ripple of the same magnitude, while maintaining low THD and rapid balancing capability. The approach is simple to implement in digital controllers and is particularly advantageous for grid-connected applications that require strict CMV limits, such as various types of solar inverters used in photovoltaic systems.