1. Introduction
The integration of large-scale photovoltaic (PV) power generation into modern power systems has introduced significant challenges regarding grid stability and reliability. Among these challenges, the low-voltage ride-through (LVRT) capability of grid-connected solar inverters has emerged as a critical technical requirement. When grid voltage sags occur due to faults, the disconnection of high-capacity PV inverters could further deteriorate the system active power deficiency, seriously affecting the stable recovery of the power grid. Therefore, extensive research on LVRT control strategies for solar inverter systems is essential to maintain grid stability and ensure continuous operation during voltage disturbances.
The existing research on LVRT for photovoltaic inverters is primarily categorized based on the inverter topology, namely single-stage and two-stage configurations. For single-stage solar inverter systems, numerous control strategies have been proposed to enhance LVRT capability. Some researchers have designed control strategies based on positive and negative sequence dual synchronous coordinate systems to suppress the fluctuation of active power output from the inverter side. Others have proposed direct power control strategies for symmetrical faults and dual closed-loop vector control strategies based on positive and negative sequence currents for asymmetrical faults. Additionally, some studies have focused on suppressing grid-connected negative sequence current using feedforward decoupling-based positive and negative sequence dual current closed-loop control strategies. However, these methods are specifically designed for single-stage photovoltaic inverters and cannot be directly applied to two-stage configurations.
For two-stage solar inverter systems, the LVRT control strategies typically involve additional hardware auxiliary circuits to achieve stable operation. Some approaches utilize DC-side unloading circuits combined with grid positive-sequence voltage oriented vector control strategies to ensure stable operation under various asymmetrical fault conditions. Other methods employ supercapacitors to absorb active power and balance DC bus voltage, thereby reducing the power injected into the inverter from the PV array during voltage sags. Nevertheless, these hardware-based solutions increase system complexity and cost. Some studies have also investigated the reactive power compensation characteristics of two-stage solar inverter systems, providing theoretical guidance for designing LVRT strategies with reactive voltage support capability. Recent research has explored flexible control strategies based on adjusting current command coefficients to achieve flexible regulation among active power fluctuation, reactive power fluctuation, or current total harmonic distortion during LVRT.
In this paper, I focus on developing an improved control strategy for the two-stage grid-connected photovoltaic inverter based on Boost circuit, aiming at enhancing its LVRT capability through software-level optimization rather than additional hardware. When grid voltage sags occur, the control structure of the Boost section is modified by introducing a DC bus voltage control loop based on fault-prior PV array maximum power point voltage feedforward. This approach rapidly regulates the output power of the PV array to balance the active power difference between the AC and DC sides of the solar inverter, thus stabilizing the DC bus voltage and preventing inverter overcurrent. During the steady-state period of the voltage sag, I implement a given current command approach to achieve coordinated control of active and reactive power, providing reactive power support to the grid to facilitate fault recovery. The proposed strategy is verified through a 100 kW two-stage solar inverter model built in PSCAD/EMTDC simulation environment.
2. System Architecture and Conventional Control of Two-Stage Solar Inverter
2.1 System Topology
The two-stage solar inverter system investigated in this work comprises a front-end Boost converter circuit and a back-end DC/AC inverter circuit. The complete circuit topology is illustrated in Table 1, which summarizes the key components and their functions.
| Component | Symbol | Parameter | Function |
|---|---|---|---|
| DC bus capacitor | C | 6000 μF | Energy storage and voltage stabilization |
| DC bus voltage | udc | 800 V | Intermediate voltage level |
| Inverter-side inductor | L1 | 0.4 mH | LCL filter component |
| Grid-side inductor | L2 | 0.05 mH | LCL filter component |
| Filter capacitor | CL | 10 μF | LCL filter component |
| Damping resistor | Rd | 1 Ω | Passive damping |
2.2 Conventional Boost Control Strategy
The output power-voltage characteristic of the PV array plays a fundamental role in understanding the control requirements. The maximum power point occurs at a specific voltage level denoted as umax, with corresponding maximum power Pmax. Under normal operating conditions, I employ the perturbation and observation method to implement Maximum Power Point Tracking (MPPT) control for the Boost converter, ensuring that the PV array operates at its maximum power output. The control structure consists of a voltage controller that regulates the PV array output voltage to track the maximum power point voltage reference.
During normal operation, the MPPT algorithm continuously adjusts the duty cycle of the Boost converter switch to maintain operation at the maximum power point. The control structure can be expressed through the following relationship:
$$u_{pv} = u_{pv\_ref} = u_{max}, \quad \text{under MPPT control}$$
where upv represents the actual output voltage of the PV array, upv_ref is the reference voltage, and umax is the maximum power point voltage determined by the MPPT algorithm.
2.3 Conventional Current Control Strategy
In the DC/AC inverter circuit, the solar inverter generally adopts an active and reactive power control strategy based on instantaneous power theory in the synchronous reference frame. The PI controllers are utilized to achieve zero steady-state error control of the d-axis and q-axis currents, with Space Vector Pulse Width Modulation (SVPWM) generating the switching signals for the power devices. The reference voltages in the dq coordinate system can be expressed as:
$$u_d = \left(k_{ip} + \frac{k_{ii}}{s}\right)(i_d^* – i_d) – \omega L i_q + e_d$$
$$u_q = \left(k_{ip} + \frac{k_{ii}}{s}\right)(i_q^* – i_q) + \omega L i_d + e_q$$
where kip and kii represent the proportional and integral coefficients of the inner current loop PI controller, respectively; id\* and iq\* are the reference current commands in the dq reference frame; ω is the grid fundamental frequency; L is the equivalent inductance of the LCL filter with the capacitor branch neglected; and ed, eq are the grid voltage components in the dq reference frame.
The overall current control structure of the solar inverter consists of two cascaded control loops: the outer DC bus voltage control loop and the inner current control loop. The outer loop generates the active current command id\* through a PI controller that regulates the DC bus voltage, while the reactive current command iq\* is determined based on system operational requirements.
2.4 LVRT Requirements
According to the technical regulations for PV power station grid integration, the solar inverter may be disconnected from the grid only when the grid voltage drops below the curve shown in Figure 5. During the LVRT period, the grid-connected operation of the solar inverter must satisfy the following conditions: (1) at the instant of voltage sag, the solar inverter should maintain uninterrupted grid-connected operation while ensuring its own safety; (2) during the LVRT period, the solar inverter should provide reactive power support to the grid.
The voltage ride-through capability requirements can be mathematically expressed as a boundary condition:
$$u_g(t) \geq u_{LVRT}(t)$$
where ug(t) is the actual grid voltage and uLVRT(t) is the required LVRT boundary voltage curve.
2.5 Impact of Low Voltage Faults on the System
Under normal operating conditions, the DC bus voltage remains stable, and neglecting power losses, the power balance relationship can be described as:
$$P_{pv} = P_{out}$$
where Ppv is the output power of the PV array and Pout is the power injected into the grid. When grid voltage sags occur, the presence of AC-side inductors and the limitation on AC output current amplitude lead to a reduction in Pout. However, the PV array output power remains unchanged, disrupting the power balance of the system. The resulting unbalanced power ΔP can be expressed as:
$$\Delta P = P_c = P_{pv} – P_{out} = \frac{1}{2}C\frac{u_{dc}’^2 – u_{dc}^2}{\Delta t}$$
where Pc represents the power absorbed by the DC bus capacitor, udc and udc‘ are the DC bus voltage amplitudes before and after the voltage sag, respectively, and Δt is the sag duration.
The impact analysis can be summarized as follows: the grid connection point voltage sag occurs almost instantaneously, causing a sudden reduction in Pout. If the Boost section continues to implement the MPPT algorithm, Ppv remains stable near the maximum power point. According to the power balance equation, energy accumulates on the bus capacitor instantaneously, causing the bus voltage to rise. As the DC bus voltage increases, the active current command id\* generated by the voltage outer loop will continue to increase, meaning the output current of the solar inverter will keep rising, if the inverter’s inherent current limiting protection is not considered.
For slight voltage sags at the grid connection point, when the grid-connected current does not exceed the safe range of the solar inverter, grid faults do not affect the control operation of the photovoltaic inverter. However, for deep sags, it may cause instantaneous overcurrent, DC bus overvoltage, and other faults. Without appropriate measures, the solar inverter will be disconnected from the grid due to self-protection mechanisms.
3. Proposed LVRT Control Strategy
3.1 Boost Control Strategy for LVRT Enhancement
Based on the aforementioned analysis, the key to achieving LVRT for the two-stage solar inverter lies in rapidly balancing the power difference between the AC and DC sides during voltage sags. For the PV array, when its output terminal voltage deviates leftward or rightward from the maximum power point voltage, the power variation exhibits asymmetry. Let the left operating point coordinates be (uleft, Pleft), and the right operating point coordinates be (uright, Pright).
I adopt the approach of controlling the Boost circuit to increase the PV array output terminal voltage to reduce the PV array output power, based on the following considerations:
(1) The maximum power point voltage of the PV array typically lies at approximately 0.8 times the open circuit voltage. Therefore, the average rate of change of output power P with respect to voltage u on the right side of the maximum power point voltage umax is larger than that on the left side. When the voltage deviation Δu is equal on both sides, the relationship Pleft > Pright holds. Consequently, when grid low voltage faults are detected, increasing the PV array output terminal voltage can reduce output power more rapidly compared to decreasing it.
(2) When severe voltage sags occur, the output power of the PV array will be limited to a relatively small value. If the output power reduction is achieved by decreasing the output terminal voltage, the PV array output terminal voltage will approach the short circuit voltage, which means the duty cycle of the switch in the Boost control circuit will approach unity. This will increase the control difficulty of the Boost switch and lead to significant fluctuations in the input and output voltages. Conversely, increasing the voltage implies reducing the switch duty cycle, which presents relatively lower control difficulty.
In summary, when the grid voltage is detected to be below 90% of the rated value, the control objective of the Boost circuit should be changed from maximum power tracking control to DC bus voltage stabilization control. The control strategy can be expressed as:
$$u_{pv\_ref} = u_{max} + \Delta u_{PI}$$
where ΔuPI is the output of the voltage PI controller during fault conditions.
| Control Mode | Reference Voltage | Control Objective | Application |
|---|---|---|---|
| MPPT Control | upv_ref = umax | Maximum power extraction | Normal operation |
| LVRT Control | upv_ref = umax + ΔuPI | DC bus voltage stabilization | Voltage sag (k < 0.9) |
During voltage sag, the DC bus voltage udc will increase, causing the voltage PI controller in the dashed box to output a positive control signal. This signal is superimposed on umax, causing the PV array output voltage to shift to the right side of the maximum power point, thereby achieving rapid regulation of the PV array output power and preventing bus voltage from exceeding limits.
3.2 Coordinated Current Control Strategy
Under normal operating conditions, the active current command id\* of the solar inverter is determined by the outer loop PI controller that regulates the DC bus voltage stability, while iq\* is typically set to zero to achieve unity power factor grid connection. During low voltage faults, to provide reactive power support to the system and assist voltage recovery, the solar inverter should output a certain amount of reactive current according to the voltage sag depth.
Defining k = uf/uN (where uf is the post-fault voltage and uN is the rated voltage at the grid connection point) as the voltage sag depth, I adopt a strategy that provides active current command id\_fault\* and reactive current command iq\_fault\* based on the voltage sag depth. The active current command variation can be described as follows:
For the time period t0 to t1 (3 ms duration after fault detection), the active current command remains at its pre-fault value to enhance system stability and avoid transient output current. From t1 to t2, the active current command linearly decreases to finally stabilize at kimax (where imax = 1.1IN, with IN being the rated current at the grid connection point). The calculation formula is:
$$i_{d\_fault}^* = i_{max} – i_R(t – t_1), \quad i_{d\_fault}^* \geq ki_{max}$$
where iR is the reference decay rate of the active current.
The reactive current command is calculated as:
$$i_{q\_fault}^* = \sqrt{i_{max}^2 – i_{d\_fault}^{*2}}$$
| Parameter | Symbol | Value/Expression |
|---|---|---|
| Maximum current limit | imax | 1.1 IN |
| Fault detection threshold | kthreshold | 0.9 |
| Steady-state active current coefficient | k | 0.1 – 0.9 (depending on sag depth) |
| Active current during fault | id_fault\* | imax – iR(t – t1) |
| Reactive current during fault | iq_fault\* | √(imax2 – id_fault*2) |
| Active current waveform duration | t0 → t1 | 3 ms (hold) |
| Active current decay duration | t1 → t2 | Linear decrease |
The complete current control block diagram during LVRT incorporates both active and reactive current commands as described above. The inverter current control can be summarized by the following equations:
$$\begin{bmatrix} u_d \\ u_q \end{bmatrix} = \begin{bmatrix} k_{ip} + \frac{k_{ii}}{s} & 0 \\ 0 & k_{ip} + \frac{k_{ii}}{s} \end{bmatrix} \begin{bmatrix} i_d^* – i_d \\ i_q^* – i_q \end{bmatrix} + \begin{bmatrix} -\omega L i_q + e_d \\ \omega L i_d + e_q \end{bmatrix}$$
4. Simulation Verification and Analysis
4.1 Simulation Setup
Based on the system topology described earlier, I constructed a 100 kW two-stage solar inverter model using PSCAD/EMTDC simulation software. The simulation parameters are summarized in Table 4.
| Parameter | Symbol | Value |
|---|---|---|
| Rated power | PN | 100 kW |
| DC bus voltage reference | udc_ref | 800 V |
| DC bus capacitance | C | 6000 μF |
| Grid frequency | f | 50 Hz |
| Grid voltage (RMS) | UN | 220 V |
| Rated current | IN | 200 A |
| Inverter-side inductor | L1 | 0.4 mH |
| Grid-side inductor | L2 | 0.05 mH |
| Filter capacitor | CL | 10 μF |
| Damping resistor | Rd | 1 Ω |
| Voltage sag magnitude | k | 0.2 p.u. |
| Fault duration | Δt | 0.1 s |
| Fault start time | tfault | 0.3 s |
For the simulation validation, I assumed that the maximum power of the PV array remains constant before and after the grid fault, and simulated a three-phase symmetrical voltage sag to 0.2 p.u. at t = 0.3 s, lasting for 0.1 s before recovery. To fully verify the effectiveness of the proposed LVRT strategy, I observed five critical measurements: three-phase grid-connected current with its active and reactive components, DC bus voltage, and PV array output power.
4.2 Simulation Results and Discussion
The simulation results demonstrate the dynamic behavior of the entire system during the low-voltage ride-through process. The key observations from the simulation are presented in Table 5.
| Measurement | Value/Range | Status |
|---|---|---|
| PV array output power during fault | ~20 kW | Rapid reduction achieved |
| DC bus voltage maximum value | 861.5 V | Within safe range (udc_ref = 800 V) |
| DC bus voltage settling time | ~6 ms | Fast transient response |
| Three-phase grid current | No overcurrent | Satisfactory current quality |
| Reactive current output | Provided during fault | Reactive power support achieved |
From the PV array output power response and DC bus voltage dynamics, I observed that when the grid low voltage fault occurs, the PV array output active power rapidly decreases to approximately 20 kW. The bus voltage experiences a short-term increase, and after approximately 6 ms, the PV array output power is regulated to equal the grid-connected power at that time, thereby suppressing further bus voltage rise. The maximum DC bus voltage reaches 861.5 V, which remains within the safe operating range. These results confirm that the adopted Boost bus voltage control strategy based on fault-prior maximum power point voltage feedforward can rapidly regulate the PV array output power, balance the power difference between the AC and DC sides of the solar inverter during faults, and prevent bus voltage from exceeding limits.
The three-phase grid-connected current does not exhibit overcurrent phenomena during the grid fault. Compared to conventional symmetrical fault simulation results, the grid-connected current under the proposed strategy does not exhibit current impact, demonstrating better current quality. The dynamic response of the current control during the fault and recovery process can be described by the following relationships:
During the fault period (t1 < t < t2):
$$i_d(t) = i_{d\_fault}^*(t) = i_{max} – i_R(t – t_1)$$
$$i_q(t) = i_{q\_fault}^*(t) = \sqrt{i_{max}^2 – i_{d\_fault}^{*2}}$$
During the recovery period (t > t3):
$$i_d(t) \rightarrow i_d^*(t) \text{ (from outer voltage controller)}$$
$$i_q(t) \rightarrow i_q^*(t) \text{ (typically 0 for unity power factor)}$$
When the system voltage begins to recover, the solar inverter’s active current output gradually increases, the reactive current gradually decreases, and the PV array output power also recovers at a relatively fast rate. The entire fault recovery process exhibits smooth current and power changes, indicating high system stability.
4.3 Comparative Analysis for Reactive Power Support Verification
To verify the effectiveness of the proposed strategy in controlling the solar inverter to output reactive current and provide voltage support to the system during LVRT, I conducted a comparative simulation validation with a control strategy without reactive current output under identical conditions. The simulation results are compared in Table 6.
| Scenario | PCC Voltage (RMS) | Voltage Difference |
|---|---|---|
| With reactive power compensation | 46.88 V | 4.97 V (relative improvement) |
| Without reactive power compensation | 41.91 V | – |
From the comparison results, when reactive power compensation is provided, the voltage at the Point of Common Coupling (PCC) is 46.88 V, while without reactive power compensation, the PCC voltage is 41.91 V, with a difference of approximately 4.97 V. Due to the limited capacity of the solar inverter itself, the reactive power that can be provided is also limited. Nevertheless, the reactive output characteristic of the solar inverter can provide a certain degree of voltage support to the grid, thereby improving the transient stability of the power system.
The reactive power injection during LVRT can be quantified as:
$$Q_{PV} = \frac{3}{2}u_q i_{q\_fault}^* = \frac{3}{2}u_q\sqrt{i_{max}^2 – i_{d\_fault}^{*2}}$$
where uq represents the q-axis voltage component.
4.4 Comparison of Control Strategies
To provide a comprehensive understanding of the advantages of the proposed strategy, I present a comparison of various LVRT approaches for two-stage solar inverter systems in Table 7.
| Strategy | Hardware Requirement | Reactive Power Support | Response Speed | Cost | Implementation Complexity |
|---|---|---|---|---|---|
| DC-side unloading circuit + vector control [8] | Additional chopper circuit | Limited | Moderate | High | Moderate |
| Supercapacitor-based energy storage [10] | Supercapacitor and interface converter | Limited | Slow | Very high | High |
| Current command coefficient adjustment [13] | None | Flexible | Fast | None | Low |
| Proposed strategy (Boost voltage control + coordinated current control) | None | Flexible | Fast | None | Low |
The proposed control strategy offers distinct advantages over hardware-based approaches. First, it eliminates the need for additional hardware devices, which significantly reduces system complexity and cost. Second, the strategy achieves fast response by rapidly adjusting the PV array output power through the Boost voltage control loop. Third, during the LVRT period, the control strategy allows for flexible adjustment of active and reactive power outputs to provide effective support for grid voltage recovery.
The relationship between voltage sag depth and current allocation is summarized in Table 8.
| Voltage Sag Depth (k) | Active Current Command (id_fault*) | Reactive Current Command (iq_fault*) | Power Factor |
|---|---|---|---|
| k ≥ 0.9 | Normal operation (MPPT) | 0 | Unity |
| 0.5 ≤ k < 0.9 | Linear reduction | √(imax2 – id_fault*2) | Leading |
| k < 0.5 | kimax (minimum) | Maximum (close to imax) | Strongly leading |
This table illustrates how the proposed strategy dynamically allocates current references based on the severity of the voltage sag, ensuring optimal grid support while maintaining the solar inverter’s operational safety. The coordinated control of active and reactive currents allows the solar inverter to contribute effectively to grid voltage recovery through reactive power injection while still delivering a controlled amount of active power to the grid.
4.5 Analysis of Power Balance Mechanism
The fundamental principle underlying the proposed control strategy is the power balance mechanism within the two-stage solar inverter system. During normal operation, the power balance equation can be expressed as:
$$P_{pv} = P_{inverter} = u_{dc} \cdot i_{inv}$$
where Pinverter is the input power of the inverter stage and iinv is the input current of the inverter.
During voltage sag conditions, the grid-connected power is limited by:
$$P_{out} = 3U_f I_{max} \cos\phi = 3(kU_N)I_{max}\cos\phi$$
where Uf is the fault voltage amplitude, UN is the rated voltage, and cosφ represents the displacement power factor.
The power imbalance that occurs during the transient period is handled by the proposed Boost control strategy as follows:
$$\Delta P = P_{pv}(u_{pv}) – P_{out} = u_{pv} \cdot i_{pv}(u_{pv}) – 3kU_NI_{max}\cos\phi$$
By regulating upv to the right side of the maximum power point, the PV array output power is reduced to match the reduced grid-connected power, thereby maintaining power balance and preventing DC bus voltage rise. The regulation process can be described by:
$$\frac{du_{dc}}{dt} = \frac{1}{Cu_{dc}}(P_{pv}(u_{pv}) – P_{out})$$
The fast response of this mechanism is crucial for effective LVRT operation. The voltage feedforward based on the pre-fault maximum power point voltage ensures that the system can react quickly to grid voltage sags without waiting for the DC bus voltage to deviate significantly from its reference value.
4.6 Dynamic Performance Evaluation
The transient performance of the proposed LVRT strategy is evaluated based on several key metrics, as summarized in Table 9.
| Performance Metric | Value | Acceptance Criteria |
|---|---|---|
| Fault detection time | < 1 ms | Fast detection |
| Current command holding time | 3 ms | Transient stability |
| Active current reduction rate | Adaptive (iR) | No overcurrent |
| DC bus voltage overshoot | < 8% (861.5 V vs 800 V) | < 10% overshoot |
| Settling time for power balance | ~6 ms | Rapid stabilization |
| Voltage recovery support | +4.97 V at PCC | Positive contribution |
The evaluation results confirm that the proposed strategy meets all the required performance criteria for effective LVRT capability enhancement of the two-stage solar inverter. The fast fault detection, appropriate current management, and stable voltage control ensure reliable operation during grid disturbances.
4.7 Discussion on Grid Support Enhancement
The capability of the proposed strategy to provide reactive power support to the grid during LVRT is a significant enhancement compared to traditional approaches. The solar inverter’s reactive power output capability during voltage sags can be quantified through the relationship between the voltage sag depth and the maximum reactive power injection.
The grid voltage recovery at the PCC can be approximated by:
$$U_{PCC} \approx U_{grid} + \frac{X_{line}}{U_{grid}}(Q_{PV} – Q_{load})$$
where Xline is the line reactance between the PCC and the grid source.
The additional voltage support provided by the solar inverter’s reactive current injection can be expressed as:
$$\Delta U = \frac{X_{line} \cdot Q_{PV}}{U_{PCC}} = \frac{X_{line} \cdot \frac{3}{2}U_{PCC} i_{q\_fault}^*}{U_{PCC}} = \frac{3}{2}X_{line} i_{q\_fault}^*$$
This analytical relationship confirms the simulation result that injecting reactive current from the solar inverter during LVRT contributes directly to grid voltage support, facilitating more effective fault recovery and system stabilization.
5. Conclusion
This paper has investigated the two-stage photovoltaic inverter based on Boost circuit and proposed a comprehensive LVRT control strategy that achieves coordinated active and reactive power control. The key contributions and findings are summarized below:
1) During grid low voltage faults, the utilization of a Boost bus voltage control loop based on fault-prior maximum power point voltage feedforward can rapidly regulate the PV array output power, balance the active power difference between the AC and DC sides of the solar inverter, and maintain the DC-side bus voltage within a safe range. The simulation results demonstrate effective suppression of bus voltage rise, with the maximum voltage limited to 861.5 V.
2) During the LVRT period, since the Boost circuit is responsible for regulating the bus capacitor voltage, the solar inverter can flexibly control the output active and reactive currents based on actual requirements, without exceeding the inverter’s maximum allowable current. This provides reactive power support to the grid to assist voltage recovery, as verified by the comparative simulation showing a 4.97 V improvement in PCC voltage during faults.
3) The proposed control strategy requires no additional hardware devices and exhibits excellent adaptability and cost-effectiveness compared to hardware-based LVRT solutions for two-stage solar inverter systems. The strategy achieves fast response, smooth transitions during fault and recovery processes, and demonstrates high system stability throughout the LVRT operation.
The research findings confirm that the two-stage solar inverter can achieve excellent LVRT capability with proper control optimization at the software level, providing a cost-effective and practical solution for enhancing grid stability in large-scale photovoltaic systems. The coordinated control of active and reactive power within the solar inverter’s current capability limits enables it to provide valuable grid support during voltage disturbances, contributing to improved power system reliability and renewable energy integration.