In the context of global carbon reduction goals, solar energy has emerged as a dominant force in the transition to low-carbon energy sources, characterized by its cleanliness, safety, independence, and controllability. However, photovoltaic (PV) systems exhibit intermittent and fluctuating output due to variations in external factors such as temperature and irradiance. The on grid inverter serves as the critical interface between PV arrays and the utility grid, facilitating power conversion and grid integration. The stability of the DC-link voltage directly impacts the control performance of the on grid inverter, thereby influencing system safety, stability, and operational efficiency. To maintain DC-link stability and reduce the total harmonic distortion (THD) of grid-connected currents, advanced control strategies for on grid inverters are of paramount importance.
Traditional control methods for on grid inverters, such as proportional-integral (PI) control, proportional-resonant (PR) control, deadbeat control, model predictive control, and repetitive control, have been widely studied. PI control, with its mature theoretical foundation, is commonly applied but may struggle with periodic disturbances and dynamic response under varying conditions. PR control offers high gain at resonant frequencies for specific harmonic compensation but lacks broad-spectrum periodic disturbance rejection. Deadbeat control provides fast response but is sensitive to model inaccuracies. Repetitive control (RC) effectively suppresses periodic distortions but introduces a delay of one fundamental period. To address the limitations of single control strategies in multi-variable, strongly coupled, and uncertain disturbance environments, composite control strategies have gained attention. This paper proposes a novel voltage-current double-loop control strategy for a T-type three-level on grid inverter, employing Linear Active Disturbance Rejection Control (LADRC) for the voltage outer loop and a combination of RC and PI for the current inner loop. The objective is to enhance both dynamic response and steady-state accuracy, ensuring robust performance against DC-link voltage variations and grid harmonics.
The system under study comprises a PV array, a front-end Boost converter, a T-type three-level diode-clamped inverter, and an LCL filter. The T-type topology offers advantages like lower switching losses and reduced output harmonic content. For modeling, we consider the three-phase system in the abc stationary frame and then transform it into the synchronous dq rotating frame to facilitate control design using PI-type controllers. The mathematical model in the abc frame is given by:
$$ L \frac{d i_{abc}}{dt} + R i_{abc} = U_{inv,abc} – U_{g,abc} $$
where \( L = L_i + L_g \) is the total inductance, \( R = R_i + R_g \) is the total resistance, \( i_{abc} \) represents the three-phase grid currents (approximated as inverter output currents), \( U_{inv,abc} \) are the inverter output voltages, and \( U_{g,abc} \) are the grid voltages. Assuming balanced grid conditions and neglecting the neutral point voltage, the model in the dq frame is derived using the Park transformation:
$$ \begin{aligned}
L \frac{di_d}{dt} &= U_{id} – R i_d + \omega L i_q – e_d \\
L \frac{di_q}{dt} &= U_{iq} – R i_q – \omega L i_d – e_q
\end{aligned} $$
Here, \( i_d \) and \( i_q \) are the d- and q-axis grid currents, \( U_{id} \) and \( U_{iq} \) are the d- and q-axis inverter output voltages, \( e_d \) and \( e_q \) are the d- and q-axis grid voltages, and \( \omega \) is the grid angular frequency. This dq model enables decoupled control of active and reactive power, which is essential for effective on grid inverter operation.
For the power balance, neglecting losses, the relationship between DC-side and AC-side power is:
$$ P_{dc} = U_{dc} I_{dc} = \frac{3}{2} (e_d i_d + e_q i_q) = P_{ac} $$
Assuming grid voltage orientation along the d-axis (\( e_d = E_m, e_q = 0 \)), the DC-link voltage dynamics can be expressed as:
$$ C_d \frac{dU_{dc}}{dt} = I_{pv} – I_{inv} \approx I_{pv} – \frac{3 E_m i_d}{2 U_{dc}} $$
where \( C_d \) is the DC-link capacitance, \( I_{pv} \) is the current from the PV array via the Boost converter, and \( I_{inv} \) is the equivalent DC current drawn by the inverter. This equation shows that the DC-link voltage \( U_{dc} \) is influenced by the d-axis current \( i_d \), forming the basis for the voltage outer loop control.
The proposed control strategy employs LADRC for the voltage outer loop to manage DC-link voltage regulation and reject disturbances. LADRC is chosen for its robustness against model uncertainties and external disturbances without requiring precise system parameters. The design begins with a first-order system representation of the DC-link voltage dynamics:
$$ \dot{U}_{dc} = f + b_0 u $$
where \( \dot{U}_{dc} \) is the derivative of the DC-link voltage, \( f \) represents the total disturbance (including model inaccuracies, parameter variations, and input power fluctuations), \( b_0 \) is a tunable gain, and \( u \) is the control input, which is related to the reference d-axis current \( i_d^* \). The total disturbance \( f \) is estimated using a Linear Extended State Observer (LESO). For a first-order system, a second-order LESO is constructed:
$$ \begin{aligned}
\dot{z}_1 &= z_2 + b_0 u + \beta_1 (U_{dc} – z_1) \\
\dot{z}_2 &= \beta_2 (U_{dc} – z_1)
\end{aligned} $$
Here, \( z_1 \) estimates \( U_{dc} \), and \( z_2 \) estimates the total disturbance \( f \). The observer gains \( \beta_1 \) and \( \beta_2 \) are determined via pole placement. Let the observer bandwidth be \( \omega_o \); then the characteristic equation is \( s^2 + \beta_1 s + \beta_2 = (s + \omega_o)^2 \), yielding \( \beta_1 = 2\omega_o \) and \( \beta_2 = \omega_o^2 \). The control law is designed as:
$$ u = \frac{u_0 – z_2}{b_0} $$
where \( u_0 \) is the output of a linear state error feedback (LSEF) controller: \( u_0 = k_p (U_{dc}^* – z_1) \), with \( k_p \) being the controller gain and \( U_{dc}^* \) the DC-link voltage reference. The controller bandwidth \( \omega_c \) can be set such that \( k_p = \omega_c \). This LADRC structure effectively compensates for disturbances in real-time, enhancing the dynamic response of the on grid inverter.
For the current inner loop, a composite controller combining PI and repetitive control (RC) is proposed to achieve high-precision current tracking and harmonic suppression. The PI controller provides fast dynamic response, while the RC tackles periodic disturbances, such as grid voltage harmonics. The transfer function of an improved RC controller is:
$$ G_{RC}(z) = \frac{k_r z^k S(z)}{1 – Q(z) z^{-N}} $$
where \( k_r \) is the RC gain, \( z^k \) is a phase lead compensator (\( k \) is the lead steps), \( S(z) \) is a low-pass filter to ensure stability at high frequencies, \( Q(z) \) is an internal model filter (often a constant slightly less than 1), and \( N = T_0 / T_s \) is the number of samples per fundamental period, with \( T_0 = 0.02 \, \text{s} \) and \( T_s = 10^{-4} \, \text{s} \), so \( N = 200 \). The RC is placed in parallel with a PI controller, forming the current inner loop controller. The overall control block diagram for the on grid inverter is summarized in the following table:
| Control Loop | Controller Type | Key Parameters | Function |
|---|---|---|---|
| Voltage Outer Loop | LADRC (first-order) | \( \omega_o, \omega_c, b_0 \) | DC-link voltage regulation, disturbance rejection |
| Current Inner Loop (d-axis) | PI + RC | \( k_p, k_i, k_r, k, Q(z), S(z) \) | Active current tracking, harmonic suppression |
| Current Inner Loop (q-axis) | PI + RC | Same as d-axis | Reactive current control (set to zero for unity power factor) |
The parameter design for RC involves selecting \( Q(z) = 0.95 \) to balance stability and performance, \( S(z) \) as a second-order low-pass Butterworth filter with cutoff frequency \( f_c = 550 \, \text{Hz} \) to attenuate high-frequency noise, \( k = 4 \) for phase compensation, and \( k_r = 0.9 \) for adequate compensation strength. The PI parameters are tuned for fast response without compromising stability. This combination ensures that the on grid inverter achieves low THD in grid currents even under distorted grid conditions.
To validate the proposed LADRC+RC control strategy, a simulation model is developed in MATLAB/Simulink for a kW-scale on grid inverter system. Key parameters are listed below:
| Parameter | Symbol | Value |
|---|---|---|
| DC-link Voltage Reference | \( U_{dc}^* \) | 600 V |
| DC-link Capacitance | \( C_d \) | 2370 µF |
| Inverter-side Inductance | \( L_i \) | 500 µH |
| Grid-side Inductance | \( L_g \) | 150 µH |
| Filter Capacitance | \( C_f \) | 10 µF |
| Grid Voltage (RMS) | \( U_g \) | 220 V |
| Grid Frequency | \( f \) | 50 Hz |
| Switching Frequency | \( f_{sw} \) | 10 kHz |
Two scenarios are simulated to compare the proposed strategy with conventional dual-loop PI control. First, the anti-disturbance performance is tested by applying step changes to the DC-link voltage reference. At \( t = 0.5 \, \text{s} \), the reference is stepped down from 600 V to 540 V. The LADRC+RC controlled system settles within approximately 0.015 s with minimal overshoot, whereas the PI-controlled system exhibits significant oscillation and takes about 0.035 s to stabilize. Similarly, for a step increase to 660 V, LADRC+RC achieves steady-state in 0.01 s, outperforming PI which requires nearly 0.05 s. This demonstrates the superior dynamic response and disturbance rejection of LADRC in the voltage loop for the on grid inverter.
Second, harmonic suppression capability is evaluated by injecting harmonics into the grid voltage: 7% 5th harmonic in phase A and 3% 7th harmonic in phase C. The grid currents under both control strategies are analyzed. With conventional PI control, the phase A current waveform shows noticeable distortion, and FFT analysis reveals a THD of 4.72%. In contrast, under LADRC+RC control, the currents remain sinusoidal with significantly reduced distortion, yielding a THD of 2.75%. The improvement is attributed to the RC’s ability to mitigate periodic harmonics, while LADRC maintains voltage stability. The following table summarizes the performance comparison:
| Performance Metric | Traditional PI Control | LADRC+RC Control |
|---|---|---|
| Settling Time (Voltage Step Down) | ~0.035 s | ~0.015 s |
| Settling Time (Voltage Step Up) | ~0.05 s | ~0.01 s |
| Current THD (with Grid Harmonics) | 4.72% | 2.75% |
| Overshoot (Voltage Step) | Significant | Minimal |
The effectiveness of the LADRC+RC strategy can be further understood through analytical insights. The LADRC’s LESO continuously estimates and compensates for disturbances, which include not only external perturbations but also coupling effects from the current loop. The estimation error dynamics are governed by:
$$ \dot{e} = (A – LC)e $$
where \( e = [U_{dc} – z_1, f – z_2]^T \), \( A \) and \( L \) are matrices from the observer design. Proper selection of \( \omega_o \) ensures rapid convergence. For the RC, stability analysis involves the sensitivity function \( S(z) = 1/(1 + P(z)C(z)) \), where \( P(z) \) is the discretized plant model of the current loop and \( C(z) = G_{PI}(z) + G_{RC}(z) \). The inclusion of \( Q(z) < 1 \) ensures that the internal model does not cause instability, while the low-pass filter \( S(z) \) attenuates high-frequency gains. The combined controller enhances the robustness of the on grid inverter across a wide frequency range.
In practice, the implementation of such a control strategy on a digital signal processor requires careful consideration of computational load and sampling effects. The LADRC algorithm involves simple algebraic operations, making it suitable for real-time applications. The RC, with its delay line of length \( N \), requires memory allocation but benefits from the periodic nature of grid disturbances. For the on grid inverter, synchronization with the grid is achieved via a phase-locked loop (PLL), ensuring accurate dq transformation. The overall control schematic integrates these elements to form a cohesive system that adapts to varying operational conditions.
In conclusion, this research presents a novel composite control strategy for a T-type three-level on grid inverter, combining LADRC for the voltage outer loop and PI plus RC for the current inner loop. The LADRC provides excellent disturbance rejection and fast dynamic response to DC-link voltage variations, addressing the inherent intermittency of PV systems. The RC, in parallel with PI, significantly reduces grid current harmonics, improving power quality. Simulation results confirm that the proposed LADRC+RC strategy outperforms traditional PI control in both anti-disturbance performance and harmonic suppression, leading to a more stable and efficient on grid inverter system. Future work may involve experimental validation and adaptation to other inverter topologies or grid conditions.
The proposed approach underscores the importance of advanced control techniques in enhancing the reliability and performance of renewable energy systems. As the penetration of PV systems grows, robust on grid inverter controls will be crucial for grid stability. The integration of LADRC and RC offers a promising solution, balancing complexity and performance, and could be extended to other power electronic applications requiring high precision and robustness.