In modern power systems, the integration of renewable energy sources has significantly increased the demand for large-scale energy storage systems. Among various topologies, the cascaded H-bridge (CHB) converter-based battery energy storage system (BESS) offers modularity, high voltage capability, and excellent power quality. However, two critical challenges hinder its wide application: the state-of-charge (SoC) imbalance among submodules, which reduces usable capacity, and the DC-link voltage surges during power transient events, which threaten system reliability. In this paper, we propose a compound control strategy that simultaneously addresses both issues. A novel adaptive power-balancing coefficient method is developed to dynamically adjust the power output of each submodule based on real-time SoC differences, ensuring rapid and stable SoC equalization while maintaining the total rated power. Furthermore, we analyze the root cause of transient voltage surges using a closed-loop transfer function model of the DC/DC converter. By introducing a capacitor voltage feedforward term into the power outer loop, the overshoot is significantly reduced. Simulation and hardware-in-the-loop experimental results demonstrate the effectiveness of the proposed strategy. The SoC balancing converges within 8 seconds under a 1 MW system, and the voltage overshoot is suppressed by up to 50% compared to conventional methods.
Introduction
The global push toward carbon neutrality has accelerated the deployment of renewable energy sources such as wind and solar. However, the inherent intermittency of these sources poses stability challenges to the grid. Energy storage systems, particularly those based on batteries, play a vital role in smoothing power fluctuations and providing grid support. Among various power conversion topologies, the cascaded H-bridge multilevel converter has emerged as a promising candidate for medium- and high-voltage battery energy storage systems due to its modular structure, low harmonic distortion, and direct grid integration capability. In a typical CHB-BESS, multiple H-bridge submodules are connected in series per phase, each equipped with an isolated battery pack and a DC/DC converter.
A fundamental issue in CHB-BESS is the imbalance of the state-of-charge among the distributed energy storage batteries. Manufacturing tolerances, aging effects, and unequal power losses cause the SoC of individual batteries to drift apart over time. Without effective balancing, the overall usable capacity of the system decreases, and some batteries may experience overcharge or deep discharge, leading to accelerated degradation. Existing balancing strategies can be classified into inter-phase and intra-phase methods. Inter-phase balancing typically injects zero-sequence voltage or negative-sequence current, but these methods can degrade power quality or reduce efficiency. Intra-phase balancing often involves modifying the modulation index or phase angle of each submodule, yet these approaches may introduce additional reactive power circulation or suffer from limited balancing speed.
Moreover, the grid-side power commands for a BESS change frequently to follow load variations or dispatch signals. During such transient events, especially when the power direction reverses, the DC-link capacitor voltage can experience severe overshoot or undershoot. This transient voltage surge stresses the capacitors and semiconductor devices, potentially reducing their lifespan. While some research has focused on SoC balancing or voltage control independently, a comprehensive solution that addresses both SoC equalization and transient voltage surge suppression is still lacking. In this work, we propose a compound control strategy that integrates an adaptive power-balancing coefficient for SoC equalization and a capacitor voltage feedforward mechanism for transient voltage surge mitigation. The strategy is validated through detailed simulations and hardware-in-the-loop experiments.
System Configuration and Basic Control
Topology of CHB-BESS
The single-phase CHB-BESS studied in this paper is composed of N H-bridge submodules connected in series. Each submodule consists of a battery pack, a bidirectional DC/DC converter, a DC-link capacitor, and an H-bridge inverter. The DC/DC stage isolates the battery from the double-line-frequency power ripple, preventing accelerated aging of the energy storage battery. The overall system is connected to the grid through a filter inductor Ls. The key parameters used in simulation and experiment are summarized in Table 1 and Table 2.
| Parameter | Value |
|---|---|
| Grid phase voltage (rms) | 5.77 kV |
| Rated power | 1 MW |
| Number of submodules (N) | 10 (simulation) / 4 (experiment) |
| Filter inductance (Ls) | 5 mH |
| DC-link capacitance (C) | 5 mF |
| Rated DC-link voltage | 1 kV (simulation) / 2.5 kV (experiment) |
| Battery rated voltage | 0.6 kV (simulation) / 1.2 kV (experiment) |
| Battery rated capacity | 15 Ah (simulation) / 1500 Ah (experiment) |
| Boost inductance | 5 mH |
| Submodule # | SoC (%) | Submodule # | SoC (%) |
|---|---|---|---|
| 1 | 69.8 | 6 | 70.0 |
| 2 | 70.2 | 7 | 69.9 |
| 3 | 70.4 | 8 | 69.6 |
| 4 | 69.7 | 9 | 70.3 |
| 5 | 70.1 | 10 | 70.0 |
Basic Control Architecture
The overall control system has two layers: the CHB converter control and the energy storage unit control. The CHB converter control employs a dual-loop structure: a current inner loop using a quasi-proportional-resonant (PR) controller for zero steady-state error at the grid frequency, and a voltage outer loop for DC-link voltage regulation and reactive power control. Voltage balancing among submodules is achieved by adding a small correction term to the modulation index based on each capacitor voltage deviation.
The energy storage unit control is implemented through the DC/DC converter, which uses a power outer loop and a current inner loop. The reference power for each submodule is initially set as the total power divided by N. The SoC balancing control modifies this reference by an adaptive coefficient, as described in the next section.
Proposed SoC Balancing Control Strategy
Principle of Power Adjustment Based on SoC
The SoC of a battery is related to its rated capacity Cn, initial SoC(t0), and the integrated output power PBat over time:
$$ \text{SoC}(t) = \text{SoC}(t_0) + \frac{1}{C_n} \int_{t_0}^{t} P_{\text{Bat}}(\tau) \, d\tau. $$
By regulating the output power of each energy storage battery, we can control its SoC trajectory. A power-balancing coefficient ki is introduced for the i-th submodule:
$$ k_i = \frac{1}{N} + \Delta k_i, $$
where Δki satisfies ΣΔki = 0 to keep the total power unchanged. The reference power for submodule i becomes:
$$ P_{\text{ref},i} = k_i P_{\text{ref}}, $$
where Pref is the total system power command. During discharge, a submodule with a higher SoC receives a larger ki to output more power, thus reducing its SoC faster. During charge, the opposite occurs.
Adaptive Calculation of ki
The power-balancing coefficient is determined by the difference between each submodule’s SoC and the average:
$$ \text{SoC}_{\text{ave}} = \frac{1}{N} \sum_{i=1}^{N} \text{SoC}_i, $$
$$ \Delta \text{SoC}_i = \text{SoC}_i – \text{SoC}_{\text{ave}}, $$
$$ k_i = \frac{1}{N} + K_{\text{SoC}} \, \Delta \text{SoC}_i \cdot \text{sign}(P_{\text{ref}}). $$
The gain KSoC is not fixed; it adapts to the maximum SoC deviation ΔSoCmax = max(ΔSoCi) – min(ΔSoCi) to achieve both fast convergence and stable operation. When ΔSoCmax > ΔSoCthreshold (e.g., 0.5), the system is in a severe imbalance region, and KSoC is set to a constant Kmin. Once ΔSoCmax drops below the threshold, KSoC increases following a power function to accelerate the final balancing stage, while being capped by Kmax to avoid instability. The relationship between KSoC and ΔSoCmax is described by:
$$ K_{\text{SoC}} = \begin{cases}
K_{\text{min}}, & \Delta\text{SoC}_{\text{max}} > \Delta\text{SoC}_{\text{th}}, \\
a_1 + a_2 (\Delta\text{SoC}_{\text{max}})^{a_3}, & \Delta\text{SoC}_{\text{min}} < \Delta\text{SoC}_{\text{max}} \leq \Delta\text{SoC}_{\text{th}}, \\
K_{\text{max}}, & \Delta\text{SoC}_{\text{max}} \leq \Delta\text{SoC}_{\text{min}}.
\end{cases} $$
The coefficients a1, a2, a3 are chosen so that the function has a steep slope near the transition point, ensuring a smooth and fast transition. This adaptive strategy prevents the energy storage battery from being forced into extreme power levels beyond 0.8~1.2 p.u. of its rated capacity.
Transient Voltage Surge Suppression
Mechanism of Voltage Surge
When the system switches between charging and discharging modes, the power flow direction reverses. The DC/DC converter actively regulates the battery power, while the H-bridge acts as a passive rectifier/inverter. Due to the finite bandwidth of the power outer loop, there is a mismatch between the demanded battery power and the actual power delivered by the H-bridge. This mismatch causes the DC-link capacitor to temporarily absorb or release energy, leading to a voltage spike. Considering the submodule equivalent circuit, where the H-bridge is represented as an equivalent resistance R, a small-signal model of the DC/DC converter yields the transfer function from the power reference perturbation P̂ref to the capacitor voltage perturbation Ûc:
$$ G_{U_c-P_{\text{ref}}}(s) = \frac{G_E(s) G_p(s)}{1 + \frac{2 U_c}{R} G_E(s) G_p(s)}, $$
where GE(s) is the control-to-output transfer function of the DC/DC stage, and Gp(s) is the power loop PI controller. The damping ratio ζ of the closed-loop system is derived as:
$$ \zeta = \frac{\lambda + \alpha K_{P,p}}{2\sqrt{\alpha\beta(\beta + \alpha) + \alpha K_{I,p}}}, $$
where KP,p and KI,p are the proportional and integral gains of the power loop, and α, β, λ are parameters dependent on circuit components and operating point. A smaller KP,p and KI,p increase the damping ratio, reducing voltage overshoot but slowing the response.
Proposed Surge Suppression via Capacitor Voltage Feedforward
To mitigate voltage surges without sacrificing steady-state performance, we introduce a feedforward path based on the average DC-link capacitor voltage Uc,ave. The feedforward adjusts the PI gains only during transients. Specifically, if the deviation of Uc,ave from its reference Uc,ref exceeds a threshold ΔU (e.g., 5% of rated voltage), the controller reduces KP,p and KI,p to soften the power loop response. Once the voltage returns to the normal range, the gains are restored to their nominal values for fast tracking. A sigmoid-type function is used for smooth transition:
$$ K_{P,I}(x) = l_{P,I} + \frac{t_{P,I}}{1 + e^{-d_{P,I}(x – x_0)}}, $$
where x = |Uc,ave – Uc,ref|, and the parameters lP,I, tP,I, dP,I, x0 are chosen to guarantee closed-loop stability. A second-order notch filter tuned at twice the grid frequency is applied to the measured Uc,ave to eliminate the inherent double-line-frequency ripple.
Simulation and Experimental Verification
Simulation Setup
A 1 MW, 10-submodule CHB-BESS model is built in Matlab/Simulink. The battery capacity is intentionally set low (15 Ah) to accelerate the SoC balancing demonstration. The system operates in four quadrants, with active power command changing from +1 MW (discharge) to -1 MW (charge) and back, while reactive power steps from 0 to ±0.2 MVar are applied.
SoC Balancing Results
The proposed adaptive balancing strategy is activated at t = 0.5 s. Figure 8 (not shown) illustrates the battery output power curves. Initially, submodules with higher SoC (e.g., #3 at 70.4%) discharge at a higher rate, while those with lower SoC (e.g., #4 at 69.7%) discharge less. The SoC curves converge gradually, reaching equilibrium after about 8 seconds. In contrast, a conventional fixed-gain strategy either converges slowly or becomes unstable if the gain is too high. The adaptive method achieves a wider balancing range and faster convergence, as summarized in Table 3.
| Control Strategy | Convergence Time (s) | Maximum ΔSoC after 8 s |
|---|---|---|
| Conventional fixed gain (low) | >15 | 0.3% |
| Conventional fixed gain (high) | Oscillatory | Diverges |
| Proposed adaptive gain | ≈8 | <0.05% |
Voltage Surge Suppression Results
Without surge suppression, the DC-link capacitor voltage overshoot during the power reversal at t = 3 s reaches 19% above the nominal 1 kV. With the proposed feedforward control, the overshoot is reduced to less than 9.7%, a reduction of about 50%. A similar improvement is observed during the second transition. The effect is consistent across different operating conditions, as shown in Table 4.
| Condition | Without suppression | With suppression | Reduction |
|---|---|---|---|
| Discharge → Charge | 19% | 9.7% | 48.9% |
| Charge → Discharge | 17% | 9.5% | 44.1% |
Hardware-in-the-Loop Experiments
A 4-submodule experimental platform is built using RTDS real-time simulator and a DSP+FPGA controller (TMS320C28346). The battery capacity is set to 1500 Ah to reflect realistic time constants. The system runs for about 30 minutes under varying commands. The SoC values of all four batteries, initially spread within 0.5%, converge to within 0.05% difference after 30 minutes, confirming the effectiveness of the adaptive balancing in a real-time environment. The voltage surge during power reversal is measured at 10.4% without suppression and 4.8% with suppression, validating the simulation results.
Conclusion
In this paper, we have presented a compound control strategy for cascaded H-bridge battery energy storage systems that simultaneously achieves fast and stable SoC balancing among distributed energy storage batteries and effectively suppresses transient DC-link voltage surges. The adaptive power-balancing coefficient method, which adjusts the gain based on the maximum SoC deviation, provides wide balancing range and rapid convergence while maintaining system stability. The transient voltage surge is mitigated by a capacitor voltage feedforward that dynamically modifies the power loop PI gains, reducing overshoot by up to 50%. Both simulation and hardware-in-the-loop experiments confirm the effectiveness of the proposed strategy. Future work will extend the method to three-phase systems and investigate the impact of battery aging on balancing performance.