In renewable energy systems, such as those utilizing photovoltaic (PV) panels or fuel cells, single-phase inverters play a critical role in converting DC power to AC power for off-grid applications. However, a significant challenge arises from the low-frequency current ripple at the input side, which is primarily caused by the pulsating nature of the output power in single-phase systems. This ripple can adversely affect the performance and lifespan of energy sources like fuel cells and PV arrays, particularly by interfering with maximum power point tracking (MPPT) and reducing efficiency. To address this, various power decoupling techniques have been developed, and among them, active power decoupling circuits integrated at the output side of inverters offer a promising solution. This article explores the topology and control strategies of a single-phase full-bridge off-grid inverter with an output-side power decoupling circuit, focusing on mitigating input current low-frequency ripples. Throughout this discussion, I will reference different types of solar inverter configurations to contextualize the innovations, as understanding the types of solar inverter designs is essential for optimizing energy systems. The proposed approach leverages shared output filter components to decouple power, thereby enhancing system reliability and performance.
The circuit topology under investigation combines a conventional full-bridge inverter with an active power decoupling circuit on the output side. As shown in the analysis, this setup splits the output filter inductor into two parts, Lf1 and Lf2, and the output filter capacitor into Co1 and Co2. The full-bridge inverter, composed of switches S1 to S4, operates alongside the decoupling circuit, which includes switches S5 and S6. By sharing the filter components, this topology minimizes additional hardware and reduces costs. The key innovation lies in superimposing a DC bias and low-frequency even-order harmonic voltages on the output filter capacitors, enabling the decoupling of pulsating power at the output side. This prevents the transmission of low-frequency ripples back to the DC input, a common issue in many types of solar inverter systems. For instance, in string inverters and microinverters—two prevalent types of solar inverter—power decoupling is often handled differently, but this output-side integration offers a streamlined alternative. The input source includes an internal resistance Rs and an input filter capacitor Ci to stabilize the DC supply.
To understand the power decoupling mechanism, consider the mathematical formulation of the system. The output voltage and current are defined as sinusoidal functions: $$u_o = U_o \sqrt{2} \sin(\omega t)$$ and $$i_o = I_o \sqrt{2} \sin(\omega t + \phi_L)$$, where Uo and Io are the RMS values, ω is the angular frequency, and φL is the load impedance angle. The voltages across the output filter capacitors Co1 and Co2 are modulated to include a DC component and a second-order harmonic: $$u_{o1} = U_{dc} + \frac{U_o \sqrt{2}}{2} \sin(\omega t) + U_2 \sin(2\omega t + \phi_2)$$ and $$u_{o2} = U_{dc} – \frac{U_o \sqrt{2}}{2} \sin(\omega t) + U_2 \sin(2\omega t + \phi_2)$$. Here, Udc represents the DC bias, while U2 and φ2 denote the amplitude and phase of the second harmonic. The currents through these capacitors, iC1 and iC2, are derived as: $$i_{C1} = C_{o1} \left[ \frac{U_o \sqrt{2}}{2} \omega \cos(\omega t) + 2\omega U_2 \cos(2\omega t + \phi_2) \right]$$ and $$i_{C2} = -C_{o2} \left[ \frac{U_o \sqrt{2}}{2} \omega \cos(\omega t) + 2\omega U_2 \cos(2\omega t + \phi_2) \right]$$. By ensuring that the input power equation balances the output and decoupling components, the low-frequency ripples are suppressed. Specifically, the second harmonic in the input current is eliminated when the following conditions are met: $$-U_o I_o \cos \phi_L + 4\omega C_{o1} U_{dc} U_2 \cos \phi_2 = 0$$ and $$-U_o I_o \sin \phi_L + \frac{\omega C_{o1} U_o^2}{2} + 4\omega C_{o1} U_{dc} U_2 \sin \phi_2 = 0$$. Solving these equations yields the required U2 and φ2, effectively decoupling the power. This approach is applicable to various types of solar inverter, including grid-tied and off-grid variants, where low-frequency ripple suppression is crucial.
The control strategy for this inverter employs a dual-loop system for both the inversion and active power decoupling parts. For the inversion section (switches S1-S4), an outer voltage loop and an inner current loop are implemented using proportional-resonant (PR) controllers. The feedback signals are derived as (iL1 – iL2)/2 for the current inner loop and uo1 – uo2 for the voltage outer loop. Similarly, the active power decoupling section (switches S5 and S6) uses -(iL1 + iL2)/2 for the current inner loop and -(uo1 + uo2)/2 for the voltage outer loop. The reference voltage for the decoupling capacitors includes DC and harmonic components: $$u_{cref}^* = U_{dc} – U_2 \sin(2\omega t + \phi_2) – U_4 \sin(4\omega t + \phi_4)$$, where U4 and φ4 are introduced to cancel higher-order harmonics. The PR controllers are tuned at resonant frequencies corresponding to the fundamental, second, and fourth harmonics to ensure accurate tracking. For example, the PR controller transfer function is given by: $$G_{PR}(s) = k_p + \frac{2k_r \omega_n s}{s^2 + 2\omega_n s + \omega_r^2}$$, where kp and kr are proportional and resonant gains, ωn is the bandwidth, and ωr is the resonant frequency. This control scheme enhances dynamic response and stability, making it suitable for diverse types of solar inverter applications, such as those in residential or commercial solar setups.
In terms of parameter design, key components like the output filter inductors and capacitors are selected based on the system specifications. For a 1 kW inverter with an output of 220 V AC at 50 Hz, the filter inductors Lf1 and Lf2 are set to 300 μH each, and the capacitors Co1 and Co2 are 60 μF, composed of parallel polypropylene capacitors for reliability. The DC bias Udc is chosen as -150 V to optimize the input voltage requirements, as detailed in the table below. This table summarizes the minimum input voltage Uimin for different Udc values under resistive full load, highlighting the trade-offs in design choices. Such considerations are vital when comparing different types of solar inverter, as they impact efficiency and compatibility with various DC sources.
| Udc (V) | U2 (V) | Udc1 (V) | Uimin (V) |
|---|---|---|---|
| 100.40 | 145.30 | 245.70 | 401.20 |
| 110.40 | 132.00 | 242.00 | 397.50 |
| 120.50 | 121.00 | 241.50 | 397.00 |
| 130.50 | 111.70 | 242.20 | 397.70 |
| 140.60 | 103.80 | 244.40 | 399.90 |
| 150.60 | 96.83 | 247.43 | 402.93 |
| 160.60 | 90.78 | 251.38 | 406.88 |
| 170.70 | 85.44 | 256.14 | 411.64 |
| 180.70 | 80.69 | 261.39 | 416.89 |
| 190.80 | 76.45 | 267.25 | 422.75 |
Furthermore, the relationship between the load impedance angle φL and the minimum input voltage Uimin is analyzed for |Udc| = 150 V. The results show that for inductive loads (φL < 0), Uimin decreases, whereas for capacitive loads (φL > 0), it increases slightly. This insight is crucial for designing robust systems across various types of solar inverter, as load characteristics can vary significantly in real-world applications. The control parameters, such as the current inner loop cutoff frequency and proportional gains, are calculated using equations like $$k_{pi} = \frac{2\pi f_{ci} L_{eq}}{K_{pwm}}$$ for the inversion part, where Leq is the equivalent inductance and Kpwm is the PWM gain. Similarly, the voltage outer loop gain is determined by $$k_{pu} = \frac{2\pi f_{cu} C_{eq}}{k}$$, ensuring stability and performance. These design principles align with best practices for many types of solar inverter, including central and string inverters, where component sizing directly affects power quality.
Experimental validation was conducted on a prototype with a 450 V DC input, 220 V AC output, and 1 kVA rated capacity. The setup used MOSFET switches and polypropylene capacitors, operating at a switching frequency of 50 kHz. The results demonstrated a significant reduction in input current low-frequency ripples when the active power decoupling circuit was enabled. For instance, under resistive full load, the second and fourth harmonic amplitudes in the input current decreased from 1.9 A and 0.74 A to 0.23 A and 0.24 A, respectively. The output voltages uo1 and uo2 exhibited the desired DC bias and harmonic components, confirming effective decoupling. Similar improvements were observed for resistive-inductive and resistive-capacitive loads, underscoring the versatility of this approach for various types of solar inverter systems. The integration of this decoupling method can enhance the performance of microinverters and string inverters, which are common types of solar inverter in distributed generation.
In conclusion, the output-side active power decoupling circuit for single-phase full-bridge off-grid inverters effectively suppresses input current low-frequency ripples by utilizing shared output filter components. This method involves superimposing DC and harmonic voltages on the capacitors, diverting pulsating power away from the DC input. The control strategy, based on dual-loop PR controllers, ensures precise tracking and stability. Parameter design guidelines, supported by mathematical analysis and experimental data, facilitate practical implementation. This innovation is particularly relevant for improving the reliability of fuel cell and PV systems, and it complements existing types of solar inverter by offering a cost-effective decoupling solution. Future work could explore scalability to higher power levels and integration with smart grid functionalities, further advancing the types of solar inverter technologies available for renewable energy applications.