1. Introduction
Energy storage systems play a pivotal role in balancing power fluctuations and enhancing the stability of distributed renewable energy grids. As a critical interface between energy storage units and the grid, bidirectional inverters require improvements in efficiency, power density, and reliability. This paper proposes an improved two-stage Dual-Buck energy storage inverter topology, addressing challenges such as bridge-arm shoot-through, switching losses, leakage current suppression, and seamless grid-tie transitions.
2. Improved Two-Stage Dual-Buck Topology
2.1 Topology Design
The proposed topology integrates a front-end DC/DC converter with a three-phase Dual-Buck full-bridge inverter (Fig. 1). The DC/DC stage enhances voltage utilization and extends switch lifespan through dual-mode operation, while the Dual-Buck inverter eliminates shoot-through risks and dead-time requirements.
2.2 Operating Modes
The Dual-Buck inverter operates in two modes:
- Full-Bridge Mode: Traditional complementary switching with parallel inductor currents.
- Half-Cycle Mode: Single-inductor conduction per half-cycle, reducing switching losses by 68.3% and conduction losses by 60.8%.
Switching losses for IGBTs are calculated as: [ P{son} = \frac{1}{2\pi} \int{-\pi}^{\pi} f_s U{CC} i_C t_r d\theta = \frac{U{dc} I_m f_s t_r}{4} ] [ P{soff} = \frac{U{dc} I_m f_s t_f}{4} ] where (U_{dc}) = 750 V, (I_m) = 37.21 A, (t_r) = 1 μs, and (t_f) = 1 μs.
2.3 Rectification Mode Analysis
In rectification, the topology employs high-frequency switching to regulate DC bus voltage. The state-space model for the DC/DC converter is: [ \begin{cases} L_1 \frac{di{L1}}{dt} = D(t)U{dc} – u{in} \ C_2 \frac{du{in}}{dt} = i{L1} – \frac{u{in}}{R_L} \end{cases} ]
3. Leakage Current Suppression Strategies
3.1 Common-Mode Voltage Analysis
Non-isolated energy storage inverter generate leakage currents due to parasitic capacitance ((C{pv}) = 3.3 nF). The common-mode voltage ((U{cm})) is expressed as: [ U{cm} = \frac{U{AO} + U{BO} + U{CO}}{3} ]
3.2 Modulation Strategies
Three modulation techniques are compared:
| Modulation | (U_{cm}) Fluctuation | Leakage Current | DC Utilization |
|---|---|---|---|
| SVPWM | (0 \leftrightarrow U_{dc}) | 7 A (peak) | 100% |
| AZSPWM2 | (U{dc}/3 \leftrightarrow 2U{dc}/3) | 2.3 A (peak) | 100% |
| RSPWM | Constant (U_{dc}/3) | <1 A (peak) | 66.7% |
AZSPWM2 balances leakage suppression (67% reduction vs. SVPWM) and voltage utilization.
3.3 Simulation Verification
MATLAB/Simulink results validate leakage current reduction (Fig. 2):
- SVPWM: (I_{leak}) = 7 A, THD = 4.2%.
- AZSPWM2: (I_{leak}) = 2.3 A, THD = 3.8%.
- RSPWM: (I_{leak}) = 0.9 A, THD = 5.1%.
4. Control Strategy Design
4.1 Three-Loop Control Architecture
The system employs voltage-current-power cascaded control:
- Inner Current Loop: Bandwidth = 1 kHz, PI parameters: (k{ip}) = 18, (k{ii}) = 1200.
- Voltage Loop: Bandwidth = 200 Hz, PI parameters: (k{vp}) = 20, (k{vi}) = 0.06.
- Power Loop: Droop control for grid synchronization: [ \Delta f = -k_p \Delta P, \quad \Delta V = -k_q \Delta Q ]
4.2 Seamless Mode Transition
- Island-to-Grid: Pre-synchronization aligns voltage magnitude, frequency, and phase. Phase-locked loop (PLL) dynamics: [ G_{PLL}(s) = \frac{k_p s + k_i}{s^2 + k_p s + k_i} ]
- Grid-to-Island: Transition within 20 ms using V/f control.
5. Experimental Validation
5.1 RT-LAB Hardware-in-Loop Platform
The setup includes:
- OP4510 real-time simulator.
- DC bus: 100 V → 750 V (Boost ratio = 7.5).
- Grid parameters: 311 V (peak), 50 Hz.
5.2 Key Results
- Inverter Mode: Output THD = 2.8%, efficiency = 97.2%.
- Rectifier Mode: DC voltage ripple <1.5%, current ripple <10%.
- Transition: <0.5% voltage dip during island-to-grid switching.
6. Conclusion
The improved Dual-Buck energy storage inverter demonstrates superior performance:
- 68.3% lower switching losses in half-cycle mode.
- 67% leakage current reduction via AZSPWM2.
- Seamless mode transitions with <20 ms latency. This topology offers a viable solution for high-efficiency, high-reliability renewable energy integration.
Tables Table 1. Switching Loss Comparison (Full-Bridge vs. Half-Cycle)
| Parameter | Full-Bridge | Half-Cycle | Reduction |
|---|---|---|---|
| Switching Loss (W) | 139.54 | 44.40 | 68.3% |
| Conduction Loss (W) | 60.71 | 37.75 | 60.8% |
Table 2. Control Loop Parameters
| Loop | Bandwidth | (k_p) | (k_i) |
|---|---|---|---|
| Current | 1 kHz | 18 | 1200 |
| Voltage | 200 Hz | 20 | 0.06 |
| Droop | 5 Hz | 0.00004 | 0.0011 |
Equations Boost Converter Transfer Function: [ G{ud}(s) = \frac{U{dc}(s)}{d(s)} = \frac{U_{dc}}{L_1 C_2 s^2 + \frac{L_1}{R_H} s + D^2} ]
Dual-Buck Inverter Model in dq-frame: [ \begin{cases} L \frac{di_d}{dt} = u_d – R i_d + \omega L i_q \ L \frac{di_q}{dt} = u_q – R i_q – \omega L i_d \end{cases} ]
This work advances the design of energy storage inverter, providing a robust framework for future smart grid applications.