In my work, I study a single-phase solar inverter that must transfer power from a photovoltaic source to an AC grid while preserving high power density, fast maximum power point tracking, and good output current quality. The central difficulty is that a single-phase solar inverter inherently produces a second-order ripple power at twice the grid frequency. If this ripple power is not buffered, it propagates into the DC input, distorts the operating point of the photovoltaic array, lowers maximum power point tracking efficiency, and increases losses. My research therefore concentrates on active power decoupling control algorithms for a solar inverter with both boost and power-decoupling capabilities.
I begin from the observation that a conventional solution uses a large electrolytic capacitor on the DC bus. Although simple, this solution reduces reliability and lifetime, because electrolytic capacitors age quickly and occupy a large volume. Active power decoupling replaces the large electrolytic capacitor with a smaller film or ceramic capacitor and an active circuit. The active circuit buffers the ripple power, so the DC source current and voltage remain nearly constant. The control algorithm is the key to making this possible. In my research, I combine continuous control set model predictive control with automatic power decoupling, and I also introduce virtual oscillator control for the AC side. The result is a family of control algorithms for the solar inverter that achieve superior steady-state decoupling, fast dynamic response, robustness to component parameter drift, and adaptability to distorted grid voltage.
Ripple power in a single-phase solar inverter. For an ideal grid and unity power factor, I write the grid voltage and output current of the solar inverter as
$$v_o=V_o\sin(\omega t),\qquad i_o=I_o\sin(\omega t).$$
The instantaneous output power is
$$p_o=v_o i_o=\frac{1}{2}V_o I_o-\frac{1}{2}V_o I_o\cos(2\omega t).$$
I define
$$P_{dc}=\frac{1}{2}V_o I_o,\qquad p_{rip}=\frac{1}{2}V_o I_o\cos(2\omega t).$$
Thus, the output power contains a constant term \(P_{dc}\) and a second-order ripple term \(p_{rip}\). In a single-phase solar inverter, this ripple term is unavoidable when the AC side is sinusoidal. If the DC side is not decoupled, the input current contains the same second-order component. This is why active power decoupling is important for a high-performance solar inverter.
When the grid voltage is distorted, the problem becomes richer. I model the grid voltage as
$$v_o=V_o\sin(\omega t)+A\sin(3\omega t)+B\sin(5\omega t)+C\sin(7\omega t),$$
where \(A\), \(B\), and \(C\) are harmonic amplitudes. With a sinusoidal output current, the instantaneous power becomes
$$p_o=P_{dc}+p_{rip2}+p_{rip4}+p_{rip6}+p_{rip8}.$$
The terms \(p_{rip2}\), \(p_{rip4}\), \(p_{rip6}\), and \(p_{rip8}\) represent second-, fourth-, sixth-, and eighth-order ripple power. Therefore, a solar inverter connected to a distorted grid must buffer not only the second-order ripple but also higher even-order ripple components if the DC source is to remain clean.
| Condition | Ripple orders in output power | Main challenge for the solar inverter |
|---|---|---|
| Ideal grid, unity power factor | Second order | Buffer \(2\omega\) ripple and keep DC input constant |
| Distorted grid with 3rd, 5th, 7th harmonics | Second, fourth, sixth, eighth order | Buffer multiple even-order ripples without complex harmonic compensators |
| Input power variation | Transient DC and ripple components | Fast dynamic response without overshoot |
| Component parameter drift | Change in ripple amplitude and phase | Robustness to inductance and capacitance variation |
Topology and boost–decoupling operation. The solar inverter I study uses a front-end DC–DC circuit and a rear-end H-bridge. The front-end circuit contains a decoupling capacitor, a decoupling inductor, and two switches. The rear-end H-bridge contains four switches and an output filter inductor. The front-end circuit operates as a rotating buck–boost stage. I define the duty ratio of the main front-end switch as \(d\). The DC bus voltage \(v_{Cb}\) is related to the photovoltaic voltage \(v_{dc}\) and the decoupling capacitor voltage \(v_{Cd}\) by
$$v_{Cb}=v_{dc}+v_{Cd}=\frac{v_{dc}}{1-d}.$$
This relation shows that the solar inverter has a boost capability. The boost function is useful because the photovoltaic voltage is usually lower than the peak grid voltage. At the same time, the decoupling capacitor voltage can swing over a wide range, so the capacitor can store and release the ripple energy.
For power decoupling, the maximum energy that must be buffered is approximately
$$\Delta E_{\max}=\frac{V_o I_o}{2\omega}=\frac{P_r}{\omega}.$$
I split the ripple power between the DC bus capacitor \(C_b\) and the decoupling capacitor \(C_d\). The capacitor values are chosen as
$$C_b=\frac{P_{rb}}{\omega B V_b},\qquad C_d=\frac{P_{rd}}{\omega B V_d},$$
where \(P_{rb}\) and \(P_{rd}\) are the ripple power portions buffered by \(C_b\) and \(C_d\), \(B\) is the allowable voltage ripple amplitude, and \(V_b\) and \(V_d\) are the average voltages. The total ripple power satisfies
$$P_{r,\mathrm{peak}}=P_{rb}+P_{rd}.$$
I also include the bus capacitor in the decoupling design because it naturally buffers part of the ripple and filters high-frequency switching components. This reduces the required capacitance of the dedicated decoupling capacitor. The relationship between \(C_d\) and \(C_b\) can be written as
$$C_d=\frac{P_{r,\mathrm{peak}}-\omega B C_b V_b}{\omega B(V_b-v_{dc})}.$$
| Parameter | Symbol | Design role in the solar inverter |
|---|---|---|
| Photovoltaic input voltage | \(v_{dc}\) | Input DC voltage from the PV source |
| Decoupling capacitor voltage | \(v_{Cd}\) | Stores and releases ripple energy |
| DC bus voltage | \(v_{Cb}\) | Supplies the H-bridge and filters switching ripple |
| Decoupling inductance | \(L_d\) | Controls current ripple and dynamic response |
| Bus capacitance | \(C_b\) | Filters high-frequency ripple and buffers part of low-frequency ripple |
| Decoupling capacitance | \(C_d\) | Main active power decoupling element |
| Output filter inductance | \(L_f\) | Shapes AC output current of the solar inverter |
Why linear control methods are not enough. I first review two linear approaches that are common for a solar inverter with power decoupling. The first is open-loop power decoupling. In open-loop control, the decoupling capacitor voltage reference is calculated from instantaneous power balance. For example, I can write
$$v_{Cd}=V_d+B\sin(2\omega t+\theta).$$
The decoupling capacitor power then becomes
$$p_{Cd}=v_{Cd}C_d\frac{dv_{Cd}}{dt}
=2\omega C_d V_d B\cos(2\omega t+\theta)
+2\omega C_d B^2\sin(4\omega t+2\theta).$$
The bus capacitor power contains a similar fourth-order term. When I set the second-order term equal to the ripple power, the DC-side second-order ripple is compensated. However, a fourth-order ripple is inherently generated by the product of the sinusoidal voltage and the derivative of the sinusoidal voltage. This fourth-order ripple must be handled if the DC source is to remain clean. In addition, the reference depends on \(C_d\), \(C_b\), and \(L_d\), so parameter drift changes the decoupling performance.
The second linear approach is automatic power decoupling with PI control. In this method, a voltage loop and a current loop regulate the DC input. The ripple power is automatically buffered by the passive elements. This is attractive because no explicit ripple reference is needed. However, the PI controller bandwidth is limited. The dynamic response is slow. The controller gains are designed around a particular operating point. When the solar inverter operates over a wide PV power range or when the grid is distorted, the gains may no longer be optimal. The transfer functions depend on \(L_d\), \(C_d\), and the steady-state duty ratio, so parameter drift also affects performance.
| Linear control method | Core idea | Main limitation in the solar inverter |
|---|---|---|
| Open-loop power decoupling | Compute \(v_{Cd}\) reference from power balance | Sensitive to \(C_d\), \(C_b\), and \(L_d\); complex when grid is distorted |
| Automatic power decoupling with PI | Regulate DC input voltage and current; passive elements buffer ripple | Slow dynamics; gain design is operating-point dependent; parameter sensitivity |
| Harmonic-suppression control | Extract ripple and inject a canceling current or voltage | Needs accurate ripple reference; filters and resonant controllers limit dynamics |
| Virtual-impedance control | Make the decoupling circuit behave like a large capacitor, inductor, or LC tank | Depends on accurate emulation and circuit structure; slower transient response |
Model predictive control for the solar inverter. I use model predictive control because it can handle nonlinearities and constraints while providing fast dynamic response. In power electronics, model predictive control is often divided into finite control set model predictive control and continuous control set model predictive control. Finite control set model predictive control directly selects a switching state from a finite set. It is simple conceptually and has a fast response, but its switching frequency is variable. Variable switching frequency complicates the design of the inductor in a solar inverter and increases the computational burden. Continuous control set model predictive control uses a modulator, so the switching frequency is fixed. This is preferable for a solar inverter because the magnetic components can be designed more reliably and the current spectrum is more predictable.
| Feature | Finite control set MPC | Continuous control set MPC |
|---|---|---|
| Switching frequency | Variable | Fixed by modulator |
| Modulator | Not required | Required |
| Inductor design | Difficult due to variable frequency | Straightforward |
| Dynamic response | Very fast | Fast |
| Computational burden | Can be high if horizon is long | Moderate |
| Suitability for solar inverter | Good but needs careful filtering | Excellent for fixed-frequency operation |
Input-current continuous control set MPC. In my first proposed method, I apply continuous control set model predictive control to the input current of the front-end circuit. I call this IC-CCS-MPC. The front-end circuit of the solar inverter has an inductor current \(i_{Ld}\), a capacitor current \(i_{Cd}\), and an input current \(i_{in}\). Using forward Euler discretization, I predict the inductor current at the next sampling instant as
$$i_{Ld}(k+1)=i_{Ld}(k)+\frac{d(k)T_s}{L_d}v_{dc}(k)-\frac{(1-d(k))T_s}{L_d}v_{Cd}(k).$$
I also predict the capacitor current and the input current. The input current prediction is
$$i_{in}(k+1)=i_{in}(k)+\frac{T_s}{L_d}\left[d(k)v_{dc}(k)-(1-d(k))v_{Cd}(k)\right].$$
I define the cost function
$$f_{cost}=\left[i_{in}(k+1)-i_{in,ref}(k+1)\right]^2.$$
Minimizing this cost function gives the optimal duty ratio
$$d(k)=\frac{L_d\left[i_{in,ref}(k+1)-i_{in}(k)\right]+T_s v_{Cd}(k)}{T_s\left[v_{Cd}(k)+v_{dc}(k)\right]}.$$
The reference current \(i_{in,ref}(k+1)\) is obtained by second-order Lagrange extrapolation:
$$i_{in,ref}(k+1)=3\left[i_{in,ref}(k)-i_{in,ref}(k-1)\right]+i_{in,ref}(k-2).$$
I also analyze stability with respect to the inductor. If the actual inductance is \(L_d\) and the controller uses \(L_{ctr}\), the discrete transfer function from the reference to the input current is stable when
$$L_d>0.5L_{ctr}.$$
This means the solar inverter remains robust even when the decoupling inductance decreases by up to fifty percent.
| IC-CCS-MPC item | Expression or value | Meaning |
|---|---|---|
| Predicted input current | \(i_{in}(k+1)=i_{in}(k)+\frac{T_s}{L_d}[d v_{dc}-(1-d)v_{Cd}]\) | One-step prediction of DC input current |
| Cost function | \(f_{cost}=[i_{in}(k+1)-i_{in,ref}(k+1)]^2\) | Minimizes current tracking error |
| Optimal duty | \(d(k)=\frac{L_d[i_{in,ref}(k+1)-i_{in}(k)]+T_s v_{Cd}}{T_s(v_{Cd}+v_{dc})}\) | Duty ratio applied through PWM |
| Stability condition | \(L_d>0.5L_{ctr}\) | Robust to inductance reduction |
| Switching frequency | Fixed by PWM | Good for magnetic design in the solar inverter |
In my simulations and experiments for the 1 kW solar inverter, IC-CCS-MPC gives better steady-state decoupling than open-loop control and automatic power decoupling with PI. The peak-to-peak input voltage fluctuation is about 6.1 V, or 3.3 percent of the rated value. The input current fluctuation is about 0.18 A. When the input voltage reference changes from 182.5 V to 210 V, the dynamic transition is less than 5 ms. In comparison, the automatic power decoupling with PI takes about 20 ms. When the decoupling capacitor is reduced from 180 \(\mu\)F to 60 \(\mu\)F, the input voltage ripple increases only slightly. When the decoupling inductor is reduced from 100 \(\mu\)H to 60 \(\mu\)H, the input voltage ripple also remains small. This confirms that IC-CCS-MPC is robust to parameter drift.
| Performance metric | Open-loop | Automatic power decoupling with PI | IC-CCS-MPC |
|---|---|---|---|
| Input voltage ripple peak-to-peak | 18 V | 12 V | 6.1 V |
| Input current ripple peak-to-peak | 0.77 A | 0.35 A | 0.18 A |
| Dynamic response | Not specified | About 20 ms | Less than 5 ms |
| Capacitor reduction robustness | Poor | Moderate | Strong |
| Inductor reduction robustness | Poor | Moderate | Strong |
| Distorted grid adaptability | Poor | Good | Very good |
Input-voltage continuous control set MPC. In IC-CCS-MPC, the input current reference is generated by an outer voltage loop. This outer loop limits the inner current loop. To remove this limitation, I propose an input-voltage continuous control set model predictive control method, which I call IV-CCS-MPC. The idea is to use a single control loop for the front-end circuit. I choose a cost function that simultaneously minimizes the input current ripple and forces the input voltage to track its reference:
$$f_{cost}=\left[i_{in}(k+1)-i_{in}(k)\right]^2+\left[v_{dc}(k+1)-v_{dc,ref}\right]^2.$$
By minimizing this cost function, I obtain a duty ratio that directly controls the photovoltaic input voltage. The solar inverter therefore avoids the cascaded voltage-loop and current-loop structure. The reference \(v_{dc,ref}\) comes from maximum power point tracking. I use a low-pass filter on this reference to avoid sudden steps. The resulting duty ratio is used in the PWM modulator. Because the cost function includes both ripple minimization and voltage tracking, the front-end circuit maintains a constant input power while the passive elements buffer the ripple power.
| Feature | IC-CCS-MPC | IV-CCS-MPC |
|---|---|---|
| Control structure | Cascaded voltage loop and current MPC | Single voltage MPC loop |
| Current reference | Generated by outer PI voltage loop | Not required |
| Dynamic limitation | Outer loop bandwidth | Reduced because outer loop is removed |
| Steady-state input voltage ripple | About 6.1 V | About 2.4 V |
| Steady-state input current ripple | About 0.18 A | About 0.07 A |
| Dynamic response | Less than 5 ms | Less than 2 ms |
| Distorted grid decoupling | Good | Excellent |
In my simulations for the 1 kW solar inverter, IV-CCS-MPC reduces the input voltage ripple peak-to-peak to about 2.4 V, which is only 1.3 percent of the rated 182.5 V. The input current ripple peak-to-peak is about 0.07 A. When the input voltage reference changes from 182.5 V to 210 V, the input voltage returns to the reference in less than 2 ms, and there is no overshoot. Under a distorted grid with 10 percent third harmonic, 10 percent fifth harmonic, and 5 percent seventh harmonic, the input voltage and input current remain nearly constant. The total harmonic distortion of the DC input voltage and current is below 0.5 percent. These results show that IV-CCS-MPC is highly effective for a solar inverter operating on a weak or distorted grid.
I also compare IV-CCS-MPC with IC-CCS-MPC. The comparison shows that IV-CCS-MPC gives lower ripple and faster dynamics. The reason is that IC-CCS-MPC uses a cascaded structure, and the outer voltage loop limits the inner current loop. IV-CCS-MPC removes the outer loop, so the predictive controller can use its full bandwidth. This is important for a solar inverter because the photovoltaic input power can change over a wide range, and the controller must maintain good decoupling at all operating points.
| Case | IC-CCS-MPC | IV-CCS-MPC |
|---|---|---|
| Rated input voltage ripple | 6.1 V peak-to-peak | 2.4 V peak-to-peak |
| Rated input current ripple | 0.18 A peak-to-peak | 0.07 A peak-to-peak |
| Dynamic recovery time | Less than 5 ms | Less than 2 ms |
| Overshoot during step change | Small | None |
| DC current harmonic under distorted grid | Moderate | Very low |
| Control complexity | Moderate | Simple |
Virtual oscillator control for the AC side. Even when the front-end decoupling is excellent, the DC bus voltage of the solar inverter still contains a low-frequency ripple. In a conventional AC-side controller, this ripple can enter the voltage outer loop and then the current reference. The result is odd-order harmonic distortion in the output current. A phase-locked loop is also commonly used to synchronize with the grid, but a phase-locked loop can introduce additional distortion when the grid voltage is distorted. To solve this problem, I propose a virtual oscillator control method for the rear-end H-bridge. Virtual oscillator control is a time-domain control method inspired by nonlinear oscillators. It can synchronize with the grid without a phase-locked loop. I use a unified virtual oscillator control framework and add grid voltage feedforward.
I define an internal control voltage vector \(\mathbf{v}_s\). Its dynamics are governed by
$$\frac{d}{dt}\mathbf{v}_s=j\omega_0\mathbf{v}_s+\eta e^{j\phi}\left(\mathbf{i}_{o,ref}-\mathbf{i}_o\right),$$
where \(\omega_0\) is the nominal angular frequency, \(\eta\) is a positive gain, \(\phi\) is a rotation angle, \(\mathbf{i}_o\) is the measured output current vector, and \(\mathbf{i}_{o,ref}\) is the output current reference vector. The output current reference is generated from the voltage vector and the active and reactive power references:
$$\mathbf{i}_{o,ref}=\frac{2}{V_p^2}
\begin{bmatrix}
v_\alpha & v_\beta\\
v_\beta & -v_\alpha
\end{bmatrix}
\begin{bmatrix}
P_0\\
Q_0
\end{bmatrix}.$$
I also add the grid voltage vector \(\mathbf{v}_o\) as a feedforward term:
$$\mathbf{v}=\mathbf{v}_s+\mathbf{v}_o.$$
Because the grid voltage vector rotates at the grid frequency, the derivative of the feedforward term provides a direct synchronization path. The active power and frequency relation and the reactive power and voltage relation can be written as
$$\frac{dV_s}{dt}=\frac{\eta}{V_s}(Q_0-Q),$$
$$\frac{d\theta}{dt}=\omega_0+\frac{\eta}{V_s^2}(P_0-P).$$
These equations show that virtual oscillator control provides a natural droop-like behavior. When the active power reference changes, the frequency adjusts. When the reactive power reference changes, the voltage amplitude adjusts. Because there is no phase-locked loop, the solar inverter avoids the synchronization problems that can occur under distorted grid conditions.
| VOC variable | Meaning | Role in the solar inverter |
|---|---|---|
| \(\omega_0\) | Nominal angular frequency | Sets the center frequency of the oscillator |
| \(\eta\) | Oscillator gain | Controls synchronization speed and damping |
| \(\phi\) | Current-error rotation angle | Selects active-power/frequency or reactive-power/voltage behavior |
| \(P_0\) | Active power reference | Generated from the DC input power |
| \(Q_0\) | Reactive power reference | Usually set to zero for unity power factor |
| \(\mathbf{v}_o\) | Grid voltage vector | Feedforward for fast synchronization |
| \(V_s\) | Oscillator voltage amplitude | Adjusts AC voltage magnitude |
The active power reference \(P_0\) is obtained from the DC side. Because the front-end IV-CCS-MPC keeps the input power nearly constant, I can write
$$P_0=\frac{v_{dc}i_{in}}{V_b},$$
where \(V_b\) is the average DC bus voltage. The DC bus voltage ripple may cause \(P_0\) to contain a second-order component. However, I analyze the small-signal model of the virtual oscillator controlled solar inverter and find that the output current is much less sensitive to this ripple than in a conventional voltage–current dual-loop controller. The small-signal model can be written as
$$\begin{bmatrix}
\Delta \dot{I}_d\\
\Delta \dot{I}_q\\
\Delta \dot{\theta}\\
\Delta \dot{V}_s
\end{bmatrix}
=
A_{4\times4}
\begin{bmatrix}
\Delta I_d\\
\Delta I_q\\
\Delta \theta\\
\Delta V_s
\end{bmatrix}
+
B_{4\times2}
\begin{bmatrix}
\Delta P_0\\
\Delta Q_0
\end{bmatrix}.$$
This model confirms that the virtual oscillator control reduces the influence of DC bus voltage ripple on the AC output current. Therefore, I do not need a moving average filter on the DC bus voltage, and I do not need a phase-locked loop. The control structure is simpler and the computational burden is lower.
I also include dead-time compensation for the H-bridge. When the output current is positive, the compensation voltage is
$$v_{c1}=v_c+v_{Cb}\frac{T_d}{2T_s},$$
and when the output current is negative, the compensation voltage is
$$v_{c1}=v_c-v_{Cb}\frac{T_d}{2T_s},$$
where \(v_c\) is the modulation reference, \(T_d\) is the dead time, and \(T_s\) is the triangular carrier period. This compensation prevents voltage deviation caused by dead time and improves the output current quality of the solar inverter.
| AC-side control feature | Conventional dual-loop control | Virtual oscillator control |
|---|---|---|
| Phase-locked loop | Required | Not required |
| Sensitivity to DC bus ripple | High | Low |
| Harmonic compensation design | Often required for distorted grid | Not required for the tested cases |
| Moving average filter | Usually needed on DC bus voltage | Not needed |
| Output current quality | Degrades under DC ripple and grid distortion | Maintained in tested cases |
| Control complexity | Moderate to high | Moderate |
Combined IV-CCS-MPC and VOC for the solar inverter. I combine the front-end IV-CCS-MPC with the rear-end virtual oscillator control. I call this combined method ICMV. The front-end controller keeps the photovoltaic input current and voltage nearly constant. The rear-end controller synchronizes with the grid without a phase-locked loop and reduces the influence of DC bus ripple on the AC current. This combination is especially suitable for a solar inverter that must operate under distorted grid voltage and varying photovoltaic power.
In my simulations, the ICMV method gives an input voltage ripple peak-to-peak of about 2.4 V and an input current ripple peak-to-peak of about 0.07 A. The output current total harmonic distortion is about 3.10 percent under an ideal grid. Under a distorted grid with third, fifth, and seventh harmonics, the output current total harmonic distortion is about 3.84 percent. The input voltage and input current remain nearly constant. The active power factor remains close to unity. When the grid frequency changes from 50 Hz to 49.5 Hz and then to 50.5 Hz, the solar inverter remains synchronized and the output current stays within the required harmonic limits. When the input voltage reference steps from 182.5 V to 210 V, the input voltage and current recover in less than 2 ms without overshoot.
| Test condition | Input voltage ripple | Input current ripple | Output current THD | Dynamic response |
|---|---|---|---|---|
| Ideal grid, rated power | About 2.4 V | About 0.07 A | About 3.10% | Not applicable |
| Distorted grid | About 2.9 V | About 0.08 A | About 3.84% | Not applicable |
| Input voltage step | No overshoot | No overshoot | Stable | Less than 2 ms |
| Grid frequency step | Constant | Constant | About 3.4% | Fast synchronization |
Experimental validation. I built a 1 kW solar inverter prototype and a 6 kW prototype. I also used a real-time hardware-in-the-loop platform. The controller was implemented on a digital signal processor. The experiments cover ideal grid operation, distorted grid operation, step changes in the input voltage reference, and variations in the decoupling inductance and capacitance. The results agree with my simulations. The input voltage and input current ripple remain small. The dynamic response is fast. The output current remains within the harmonic limits. The 6 kW prototype confirms that the method scales to higher power. In the 6 kW case, the required decoupling capacitance is reduced by about 66 percent compared with a passive solution that uses only a large electrolytic capacitor.
| Parameter | 1 kW prototype | 6 kW prototype |
|---|---|---|
| Rated power | 1 kW | 6 kW |
| Rated input voltage | 182.5 V | 200 V |
| DC bus average voltage | 380 V | 400 V |
| Output voltage peak | 311 V | 311 V |
| Decoupling capacitor | 160 \(\mu\)F | 725 \(\mu\)F |
| Bus capacitor | 80 \(\mu\)F | 290 \(\mu\)F |
| Decoupling inductor | 100 \(\mu\)H | 300 \(\mu\)H |
| Output filter inductor | 4 mH | 1 mH |
| Sampling frequency | 40 kHz | 40 kHz |
| Inverter switching frequency | 20 kHz | 20 kHz |
For the hardware-in-the-loop experiments, I set the grid to contain 10 percent third harmonic, 10 percent fifth harmonic, and 5 percent seventh harmonic. Under these conditions, the conventional rear-end inverter control produces noticeable distortion in the output current. In contrast, the ICMV method maintains a clean output current. The input voltage and input current remain nearly constant. This shows that the virtual oscillator control effectively rejects the effect of DC bus ripple and grid voltage distortion. It also avoids the need for a moving average filter and a phase-locked loop.
| Control method | Front-end controller | Rear-end controller | PLL required | DC bus filter required |
|---|---|---|---|---|
| Open-loop decoupling | Open-loop reference | Conventional dual loop | Yes | Yes |
| APD-PI | PI voltage and current loops | Conventional dual loop | Yes | Yes |
| IC-CCS-MPC | PI voltage loop plus current MPC | Improved dual loop with MAF and notch | Yes, with notch | Yes |
| IV-CCS-MPC | Single voltage MPC loop | Improved dual loop with MAF and notch | Yes, with notch | Yes |
| ICMV | Single voltage MPC loop | Virtual oscillator control | No | No |
Overall comparison. I summarize the main control algorithms in the following table. The comparison includes steady-state decoupling, dynamic response, robustness to component drift, adaptability to distorted grid, and control complexity. The proposed ICMV method gives the best overall balance for a solar inverter that must operate in a practical distributed photovoltaic system.
| Algorithm | Steady-state decoupling | Dynamic response | Parameter drift robustness | Distorted grid adaptability | Control complexity |
|---|---|---|---|---|---|
| Open-loop power decoupling | Moderate | Slow | Poor | Poor | Low |
| Automatic power decoupling with PI | Good | Slow | Moderate | Good | Moderate |
| IC-CCS-MPC | Very good | Fast | Strong | Very good | Moderate |
| IV-CCS-MPC | Excellent | Very fast | Strong | Excellent | Moderate |
| ICMV | Excellent | Very fast | Strong | Excellent | Moderate |
I also compare the key operating metrics in a quantitative table. The input voltage ripple is expressed as a percentage of the rated input voltage. The input current ripple is expressed as a percentage of the rated input current. The dynamic response is the time needed to recover after a step change.
| Metric | Open-loop | APD-PI | IC-CCS-MPC | IV-CCS-MPC | ICMV |
|---|---|---|---|---|---|
| Input voltage ripple | About 10% | About 6.5% | About 3.3% | About 1.3% | About 1.3% |
| Input current ripple | About 14% | About 6.3% | About 3.2% | About 1.3% | About 1.3% |
| Dynamic recovery | Not specified | About 20 ms | Less than 5 ms | Less than 2 ms | Less than 2 ms |
| Output current THD under distorted grid | High | Moderate | About 3.8% | About 3.8% | About 3.8% |
| Robustness to inductance reduction | Poor | Moderate | Strong | Strong | Strong |
| Robustness to capacitance reduction | Poor | Moderate | Strong | Strong | Strong |
Design guidelines from my work. Based on my analysis, I can give the following design guidelines for a solar inverter with active power decoupling. First, the decoupling capacitor and bus capacitor should be designed together. The bus capacitor can buffer part of the low-frequency ripple and filter high-frequency switching ripple, so the dedicated decoupling capacitor can be smaller. Second, the decoupling inductor should be selected according to the maximum allowable current ripple and the desired dynamic response. A smaller inductor gives faster dynamics but larger current ripple. Third, the control algorithm should avoid relying on a precise ripple reference, because the ripple reference depends on parameters that may drift. Fourth, the AC-side controller should be robust to DC bus voltage ripple. Virtual oscillator control is a good choice because it does not require a phase-locked loop and it reduces the sensitivity of the output current to DC bus ripple. Fifth, when the grid is distorted, the controller should not require a separate harmonic compensator for every harmonic order. The automatic power decoupling concept and the virtual oscillator control concept both help to reduce the need for such compensators.
| Design task | Recommended approach | Reason |
|---|---|---|
| Choose decoupling capacitor | Split ripple between \(C_d\) and \(C_b\) | Reduces total capacitance and improves power density |
| Choose decoupling inductor | Balance current ripple and dynamic response | Prevents saturation and maintains fast control |
| Front-end control | Use IV-CCS-MPC | Single loop, fast response, strong decoupling |
| Rear-end control | Use virtual oscillator control | Avoids PLL and reduces DC ripple sensitivity |
| Distorted grid operation | Use automatic power decoupling plus grid feedforward | Buffers multiple ripple orders without complex compensators |
| Parameter drift | Use predictive control with stability margin | Maintains performance when \(L_d\) or \(C_d\) changes |
Contributions of my research. The main contributions of my work can be summarized as follows. I propose an input-current continuous control set model predictive control method for a solar inverter with boost and power decoupling capabilities. This method combines automatic power decoupling with fixed switching frequency predictive control. It improves steady-state decoupling, dynamic response, parameter drift robustness, and distorted grid adaptability compared with open-loop and PI-based linear control. I then propose an input-voltage continuous control set model predictive control method. This method uses a single control loop and a cost function that simultaneously minimizes input current ripple and tracks the input voltage reference. It removes the outer voltage loop limitation and further improves decoupling performance. Finally, I propose a combined input-voltage continuous control set model predictive control and virtual oscillator control method. This method solves the problem of DC bus voltage ripple affecting the AC output current. It does not require a phase-locked loop or a moving average filter. It performs well under distorted grid voltage and varying photovoltaic power. These contributions provide a practical path toward a high-power-density, high-reliability solar inverter for distributed photovoltaic systems.
| Contribution | Method | Main benefit for the solar inverter |
|---|---|---|
| Fixed-frequency predictive decoupling | IC-CCS-MPC | Fast dynamics, fixed switching frequency, good decoupling |
| Single-loop predictive decoupling | IV-CCS-MPC | Removes outer-loop limitation, lower ripple, faster response |
| PLL-less AC-side control | Virtual oscillator control | Reduces DC ripple sensitivity and avoids PLL problems |
| Combined front-end and rear-end control | ICMV | Excellent steady-state and dynamic performance under distorted grid |
| Robust passive design | Joint \(C_d\) and \(C_b\) design | Smaller capacitance, higher power density, longer lifetime |
Future work. In future work, I plan to extend the control algorithms to other active power decoupling topologies. I also plan to study common-mode current suppression, because common-mode current is important in transformerless photovoltaic systems. I intend to develop a unified control framework that combines the front-end decoupling controller and the rear-end inverter controller into a single optimization problem. I also plan to test the algorithms under more severe grid conditions, including unbalanced voltage, frequency deviation, and weak grid impedance. Finally, I plan to investigate the use of wide-bandgap devices in the solar inverter to further increase switching frequency and reduce passive component size. These future directions will help to make active power decoupling more practical for distributed photovoltaic generation.
| Future direction | Goal | Expected impact on the solar inverter |
|---|---|---|
| Topology extension | Apply predictive decoupling to other topologies | Wider applicability |
| Common-mode current suppression | Improve transformerless safety | Better leakage current performance |
| Unified control framework | Coordinate front-end and rear-end control | Simpler design and better global performance |
| Weak grid testing | Validate under high grid impedance | Improved robustness |
| Wide-bandgap devices | Increase switching frequency | Smaller passive components and higher power density |
In conclusion, my research shows that continuous control set model predictive control is well suited to the power decoupling problem in a single-phase solar inverter. By combining predictive control with automatic power decoupling, I obtain a controller that does not need a precise ripple reference and does not depend strongly on passive component parameters. By moving from input-current predictive control to input-voltage predictive control, I remove the cascaded loop limitation and achieve faster and cleaner decoupling. By adding virtual oscillator control on the AC side, I avoid the phase-locked loop and reduce the influence of DC bus voltage ripple on the output current. The resulting solar inverter control system has a simple structure, strong robustness, fast dynamic response, and excellent performance under distorted grid voltage. I believe these results are useful for the next generation of high-reliability, high-power-density photovoltaic inverters.