In modern power electronics, pulse width modulation (PWM) techniques are fundamental for AC-DC power conversion, with applications ranging from photovoltaic systems to electric vehicle charging. Among these, sinusoidal PWM (SPWM) is widely used due to its simplicity and effectiveness. Traditional constant switching frequency SPWM (CSFSPWM) concentrates harmonic energy at the switching frequency and its multiples, leading to significant electromagnetic interference (EMI) and reduced system performance. To address this, variable switching frequency SPWM (VSFSPWM) methods have been developed, which optimize the switching frequency to spread harmonic energy across a broader spectrum, thereby reducing EMI peaks and improving efficiency. However, existing VSFSPWM techniques, such as random PWM (RPWM) and specific harmonic elimination PWM (SHEPWM), often suffer from limitations like unpredictable performance, computational complexity, or lack of generality.
Passive variable switching frequency SPWM (PVSFSPWM) introduces the concept of an injection function and depth to generate triangular carriers with constant slope but variable amplitude, offering controllable performance and straightforward implementation. Nonetheless, the selection of the injection function and depth relies heavily on empirical choices, which may limit the optimization of system performance. To overcome this, we propose an optimized PVSFSPWM technique based on the non-dominated sorting genetic algorithm II (NSGA-II), referred to as NSGA-II-PVSFSPWM. This approach optimizes each switching cycle by minimizing switching losses and current ripple, leveraging multi-objective optimization to achieve a balanced solution. The method is particularly relevant for single phase inverter systems, where efficiency and harmonic distortion are critical.
In this article, we detail the principles of NSGA-II-PVSFSPWM, including the formulation of input variables, objective functions, and the evaluation process. We analyze the time-domain characteristics, such as current ripple and switching loss, and validate the approach through experiments on a 1 kW single phase inverter. The results demonstrate significant improvements in harmonic suppression, current ripple reduction, and efficiency compared to conventional methods. The integration of optimization algorithms into PWM strategies represents a step forward in enhancing the performance of power electronic converters, especially in single phase inverter applications where compact design and high reliability are essential.
Principle of NSGA-II-PVSFSPWM
The core idea of NSGA-II-PVSFSPWM is to dynamically adjust the switching frequency in each cycle based on multi-objective optimization, targeting reduced switching losses and current ripple. The optimization process involves defining input variables, objective functions, and constraints, followed by the application of the NSGA-II algorithm to generate a Pareto-optimal set of solutions. Below, we outline the key components of this approach.
Input Variables and Objective Functions
The input variable for optimization is the half-switching period, denoted as \( T_i/2 \), where \( T_i \) is the switching period for the \( i \)-th cycle. This variable is chosen because it directly influences both switching losses and current ripple. The constraints on \( T_i/2 \) are derived from the PVSFSPWM framework: the minimum switching frequency must exceed half the base frequency \( f_b \) to avoid filter resonance, and the maximum switching frequency should be less than twice \( f_b \) to prevent excessive device stress. Thus, \( T_i/2 \) is bounded as follows:
$$ \frac{T_b}{4} < \frac{T_i}{2} < 4T_b $$
where \( T_b = 1/f_b \) is the base switching period. The relationship between \( T_i \) and the carrier height \( h_i \) is given by \( T_i = h_i T_b \), based on similar triangle principles in the carrier waveform.
The switching loss \( P_{swi} \) for the \( i \)-th cycle is modeled using data from power device datasheets, where losses are proportional to the collector current. The expressions for turn-on loss \( E_{on}(i) \) and turn-off loss \( E_{off}(i) \) are:
$$ E_{on}(i) = k_1 I_m \sin(\omega_r \Delta t_i) + b_1 $$
$$ E_{off}(i) = k_2 I_m \sin(\omega_r \Delta t_i) + b_2 $$
Here, \( I_m \) is the peak output current, \( \omega_r \) is the angular frequency of the modulation wave, \( \Delta t_i \) is the time corresponding to the \( i \)-th carrier peak, and \( k_1 \), \( k_2 \), \( b_1 \), \( b_2 \) are fitting coefficients. The total switching loss per cycle is:
$$ P_{swi} = \frac{E_{on}(i) + E_{off}(i)}{h_i T_b} $$
The current ripple \( i_{pvsfi} \) for the \( i \)-th cycle under PVSFSPWM is derived from the inverter’s operating principles. For a single phase inverter with bipolar modulation, the current ripple is expressed as:
$$ i_{pvsfi} = \frac{(1 + m \sin(\omega_r \Delta t_i))(1 – m \sin(\omega_r \Delta t_i)) U_{dc}}{4 L f_b h_i} $$
where \( m \) is the modulation index, \( U_{dc} \) is the DC bus voltage, and \( L \) is the filter inductance. To ensure that the current ripple does not exceed that of CSFSPWM, we impose the constraint \( i_{pvsfi} < i_{csf\_max} \), where \( i_{csf\_max} = U_{dc} / (4 L f_b) \).
Evaluation Function
Since the objectives of minimizing switching loss and current ripple are conflicting, NSGA-II produces a set of Pareto-optimal solutions. To select a single solution for practical implementation, we employ fuzzy set theory to compute satisfaction degrees for each objective. The satisfaction degree for switching loss \( J_{pswi} \) and current ripple \( J_i \) are defined as:
$$ J_{pswi} = \begin{cases}
1, & \text{if } P_{swi} \leq P_{swi}^{\min} \\
\frac{P_{swi}^{\max} – P_{swi}}{P_{swi}^{\max} – P_{swi}^{\min}}, & \text{if } P_{swi}^{\min} < P_{swi} < P_{swi}^{\max} \\
0, & \text{if } P_{swi} \geq P_{swi}^{\max}
\end{cases} $$
$$ J_i = \begin{cases}
1, & \text{if } i_{pvsfi} \leq i_{pvsfi}^{\min} \\
\frac{i_{pvsfi}^{\max} – i_{pvsfi}}{i_{pvsfi}^{\max} – i_{pvsfi}^{\min}}, & \text{if } i_{pvsfi}^{\min} < i_{pvsfi} < i_{pvsfi}^{\max} \\
0, & \text{if } i_{pvsfi} \geq i_{pvsfi}^{\max}
\end{cases} $$
The overall evaluation function \( J \) is a weighted sum:
$$ J = w_1 J_{pswi} + w_2 J_i $$
where \( w_1 \) and \( w_2 \) are weights that reflect the relative importance of switching loss and current ripple, respectively. The solution with the highest \( J \) is chosen as the optimal compromise.
Implementation of NSGA-II-PVSFSPWM
The optimization process for each switching cycle is illustrated in the flowchart below. Initially, the input variable \( T_i/2 \) is defined with constraints based on the carrier slope and system dynamics. The NSGA-II algorithm is configured with a population size of 100 and 100 generations. Key steps include non-dominated sorting, crowding distance calculation, tournament selection, crossover, and mutation. The crossover probability is set to 0.85, and the mutation probability is 0.1. After iteration, the Pareto set is generated, and the best solution is selected using the evaluation function.
For a full fundamental period, the process is repeated for each switching cycle within a quarter-period due to symmetry. The optimized values of \( T_i/2 \) are stored in a set \( A = \{h_1, h_2, \ldots, h_N\} \), where \( N \) is the number of carrier cycles per fundamental period. This set defines the injection function \( h_e \), which is smoothed by fitting a piecewise function. The injection depth \( D(\lambda, \delta) \) is characterized by the peak-to-peak value \( \lambda = h_{e,\max} – h_{e,\min} \) and the offset \( \delta \).
The equivalent switching frequency \( f_{avg} \) for NSGA-II-PVSFSPWM is derived from the injection function and can be calculated as:
$$ f_{avg} = \frac{2(1 – 200\lambda) + 200(2\delta – \lambda) \arctan\left(\frac{\lambda}{2}\right)}{(\lambda^2 + 2\delta\lambda – \lambda^2)} $$
This ensures a fair comparison with CSFSPWM by matching the average switching frequency.
Mathematical Analysis
The injection function \( h_e \) for NSGA-II-PVSFSPWM is a piecewise function defined over a quarter fundamental period. It takes the form:
$$ h_e(t) = \begin{cases}
a t^2 + \delta – \frac{\lambda}{2}, & 0 \leq t \leq t_p \\
\delta + \frac{\lambda}{2}, & t_p < t \leq \frac{T_r}{2} – t_p \\
-a (t – \frac{T_r}{2})^2 + \delta – \frac{\lambda}{2}, & \frac{T_r}{2} – t_p < t \leq \frac{T_r}{2}
\end{cases} $$
where \( a \) is a quadratic coefficient, \( t_p \) is a segment time, \( T_r \) is the fundamental period, and \( \lambda \) and \( \delta \) are the peak-to-peak and offset of the injection depth, respectively. The values of \( a \), \( t_p \), \( \lambda \), and \( \delta \) are determined through optimization. For instance, with a base frequency \( f_b = 1 \, \text{kHz} \), typical values are \( \lambda = 0.3266 \) and \( \delta = 0.9920 \).
The modulation process involves comparing the modulation wave \( u_r \) with the variable-amplitude triangular carrier \( u_c \). The FFT analysis of the output PWM voltage shows that NSGA-II-PVSFSPWM reduces the harmonic peak from 225.72 V under CSFSPWM to 94.17 V, demonstrating effective harmonic spreading. Additionally, EMI simulations indicate a reduction in noise peaks by approximately 10.6 dB, highlighting the method’s efficacy in EMI suppression for single phase inverter systems.
Time-Domain Characteristics
Current Ripple Analysis
The current ripple under NSGA-II-PVSFSPWM is analyzed theoretically and via simulation. The maximum current ripple \( i_{pvsfi} \) is calculated using the derived expression and compared with CSFSPWM and traditional PVSFSPWM (TRI-PVSFSPWM). At a switching frequency of 15 kHz, NSGA-II-PVSFSPWM achieves a peak current ripple of 1.4916 A, whereas CSFSPWM and TRI-PVSFSPWM yield 1.7998 A and 1.5523 A, respectively. This represents a reduction of 3.92% compared to CSFSPWM and 2% compared to TRI-PVSFSPWM.
The output voltage total harmonic distortion (THD) is also improved. Under NSGA-II-PVSFSPWM, the voltage THD is 1.06%, with a harmonic peak of 0.92 V, while CSFSPWM results in a THD of 1.26% and a peak of 2.84 V. The tabulated data below summarizes the current ripple and THD comparisons for different switching frequencies.
| Modulation Technique | Switching Frequency (kHz) | Peak Current Ripple (A) | Voltage THD (%) |
|---|---|---|---|
| CSFSPWM | 10 | 2.10 | 1.30 |
| CSFSPWM | 15 | 1.80 | 1.26 |
| CSFSPWM | 20 | 1.50 | 1.22 |
| TRI-PVSFSPWM | 10 | 1.95 | 1.28 |
| TRI-PVSFSPWM | 15 | 1.55 | 1.25 |
| TRI-PVSFSPWM | 20 | 1.30 | 1.20 |
| NSGA-II-PVSFSPWM | 10 | 1.85 | 1.26 |
| NSGA-II-PVSFSPWM | 15 | 1.49 | 1.06 |
| NSGA-II-PVSFSPWM | 20 | 1.25 | 1.04 |
Switching Loss Analysis
Switching losses are evaluated over the fundamental period. The distribution of losses shows that NSGA-II-PVSFSPWM reduces losses compared to CSFSPWM, especially at higher switching frequencies. For example, at \( f_b = 10 \, \text{kHz} \), the switching loss is 6.7124 W for NSGA-II-PVSFSPWM, versus 7.2924 W for CSFSPWM and 6.9516 W for TRI-PVSFSPWM. As the switching frequency increases, the loss reduction becomes more pronounced, with improvements of up to 1.32% in efficiency at 20 kHz.
The following table provides a detailed comparison of switching losses and efficiency for different modulation techniques across various switching frequencies.
| Modulation Technique | Switching Frequency (kHz) | Switching Loss (W) | Efficiency (%) |
|---|---|---|---|
| CSFSPWM | 10 | 7.2924 | 92.76 |
| CSFSPWM | 15 | 8.1231 | 92.10 |
| CSFSPWM | 20 | 9.0450 | 91.71 |
| TRI-PVSFSPWM | 10 | 6.9516 | 92.89 |
| TRI-PVSFSPWM | 15 | 7.8120 | 92.30 |
| TRI-PVSFSPWM | 20 | 8.7345 | 91.90 |
| NSGA-II-PVSFSPWM | 10 | 6.7124 | 93.65 |
| NSGA-II-PVSFSPWM | 15 | 7.5432 | 93.20 |
| NSGA-II-PVSFSPWM | 20 | 8.4658 | 93.03 |
Experimental Verification
To validate the proposed NSGA-II-PVSFSPWM method, we constructed a 1 kW single phase full-bridge inverter platform. The system includes a DC power supply, H-bridge inverter, LC filter, control board based on a TMS320F28335 DSP, and auxiliary circuits. The experimental parameters are listed in the table below.
| Parameter | Symbol | Value |
|---|---|---|
| AC Output Voltage | \( u_o \) | 220 V @ 50 Hz |
| DC Input Voltage | \( U_{dc} \) | 360 V |
| Modulation Index | \( m \) | 0.86 |
| Rated Power | \( P \) | 1 kW |
| Filter Inductance | \( L \) | 5 mH |
| Filter Capacitance | \( C \) | 4.7 μF |
The experimental results confirm the superiority of NSGA-II-PVSFSPWM. The harmonic spectrum of the output PWM voltage shows a peak reduction from 185.77 V under CSFSPWM to 78.35 V under NSGA-II-PVSFSPWM, indicating effective harmonic spreading. The output voltage and current waveforms exhibit lower distortion, with THD values of 2.60% for NSGA-II-PVSFSPWM compared to 2.63% for CSFSPWM and 2.53% for TRI-PVSFSPWM. The current ripple measurements align with simulations, showing reductions of 3.92% and 2% relative to CSFSPWM and TRI-PVSFSPWM, respectively, at 15 kHz.
Efficiency measurements demonstrate consistent improvements, with NSGA-II-PVSFSPWM achieving 93.65% efficiency at 10 kHz, compared to 92.76% for CSFSPWM and 92.89% for TRI-PVSFSPWM. At 20 kHz, the efficiency gains are even more pronounced, reaching 93.03% versus 91.71% for CSFSPWM. These results underscore the effectiveness of the optimized modulation technique in enhancing the performance of single phase inverter systems.
Conclusion
In this article, we presented NSGA-II-PVSFSPWM, an optimized variable switching frequency SPWM technique for single phase inverter applications. By leveraging the NSGA-II algorithm, we dynamically adjusted the switching frequency to minimize switching losses and current ripple, achieving a balanced solution through multi-objective optimization. The mathematical analysis and time-domain evaluations confirmed significant improvements in harmonic suppression, EMI reduction, and efficiency. Experimental results on a 1 kW inverter platform validated the theoretical predictions, showing notable gains over conventional methods. The proposed approach offers a practical and efficient solution for enhancing the performance of power electronic converters, particularly in single phase inverter systems where compact design and high reliability are paramount. Future work could explore real-time implementation and adaptation to other converter topologies.