I study conducted electromagnetic interference in a solar inverter because the solar inverter is the central power conversion device between a photovoltaic array, a local load, and the utility grid. When the switching devices inside a solar inverter operate at high frequency, the resulting voltage and current transitions interact with parasitic capacitances, parasitic inductances, cables, and the grid impedance. These interactions produce common-mode and differential-mode noise currents that can degrade power quality, disturb communication equipment, and prevent the solar inverter from satisfying electromagnetic compatibility standards. My work therefore focuses on the generation mechanism, coupling path, noise source impedance extraction, passive EMI filter design, and multi-objective volume optimization of a solar inverter.
I treat the solar inverter as a system containing a DC-DC boost stage, a DC-AC T-type three-level inverter stage, an output harmonic filter, an EMI filter, and a line impedance stabilization network for measurement. The solar inverter generates broadband noise from 150 kHz to 30 MHz. In this frequency range, the physical layout, device parasitics, and filter component nonidealities dominate the measured spectrum. I use first-person analysis throughout this article because the design decisions are connected to measurements, models, and optimization steps that I perform on the solar inverter.
I begin with the switching process. The insulated-gate bipolar transistor is a key noise source in the solar inverter. I divide its turn-on process into four intervals. In the first interval, the gate voltage charges the gate-emitter and gate-collector capacitances, and the collector current remains zero until the gate voltage reaches the threshold. I write the gate voltage as
$$V_{ge}(t)=V_{g}\left[1-e^{-\frac{t}{R_g(C_{cg}+C_{ge})}}\right].$$
I define the time at which the gate voltage reaches the threshold voltage as
$$t_1=R_g(C_{cg}+C_{ge})\ln\left(\frac{V_g}{V_g-V_{th}}\right).$$
In the second interval, the conductive channel forms, the collector current rises, and the collector-emitter voltage falls because of the parasitic inductance. I express the collector-emitter voltage as
$$V_{ce}(t)=V_{dc}-L_s\frac{di_c(t)}{dt}.$$
In the third interval, the reverse recovery of the freewheeling diode causes an overshoot in the collector current. The current reaches the reverse recovery peak and then returns to the load current. In the fourth interval, the gate voltage reaches the on-state value, the collector-emitter voltage reaches the saturation voltage, and the device remains fully on. I summarize the turn-on process in the following table.
| Turn-on interval | Physical behavior | Dominant noise mechanism |
|---|---|---|
| First interval | Gate capacitances charge, no collector current | Gate current and displacement current |
| Second interval | Channel forms, collector current rises | High $di/dt$ in parasitic inductance |
| Third interval | Diode reverse recovery, current overshoot | Current ringing and high-frequency oscillation |
| Fourth interval | Device fully on, voltage reaches saturation | Residual ringing and parasitic coupling |
I analyze turn-off in a similar way. The gate voltage decays according to
$$V_{ge}(t)=V_{g}e^{-\frac{t}{R_g(C_{cg}+C_{ge})}}.$$
During the first turn-off interval, the gate voltage falls but the conductive channel still exists, so the collector current remains near the load current. During the second interval, the collector-emitter voltage rises. When the voltage is low, the gate-collector capacitance is large, so the voltage slope is small. When the voltage increases, the gate-collector capacitance decreases, so the voltage slope becomes larger. During the third interval, the collector current falls rapidly, and the parasitic inductance produces an overvoltage. During the fourth interval, the conductive channel disappears, the current reaches zero, and the collector-emitter voltage returns to the DC link voltage. I summarize the turn-off process below.
| Turn-off interval | Physical behavior | Dominant noise mechanism |
|---|---|---|
| First interval | Gate capacitances discharge, channel still on | Gate discharge and stored charge |
| Second interval | Collector-emitter voltage rises | High $dv/dt$ through parasitic capacitance |
| Third interval | Collector current falls rapidly | High $di/dt$ through parasitic inductance |
| Fourth interval | Channel disappears, current reaches zero | Overvoltage ringing and common-mode coupling |
For the solar inverter, the T-type three-level topology is attractive because it reduces harmonic distortion and voltage stress. However, it contains multiple switching devices and clamping paths, so the conducted noise mechanism is more complex than that of a two-level inverter. I list the output level and switching states of one phase of the T-type three-level solar inverter in the following table.
| $S_{a1}$ | $S_{a2}$ | $S_{a3}$ | $S_{a4}$ | Output level |
|---|---|---|---|---|
| 1 | 1 | 0 | 0 | $+U_{dc}/2$ |
| 0 | 1 | 1 | 0 | 0 |
| 0 | 0 | 1 | 1 | $-U_{dc}/2$ |
I model the AC-side and DC-side conducted noise paths separately. On the AC side, the common-mode current flows through any phase, the parasitic capacitance to ground, the DC-link midpoint, and the measurement ground. The differential-mode current flows between phases through the harmonic filter, the parasitic inductances, and the line impedance stabilization network. I express the relationship between phase currents and common-mode and differential-mode currents as
$$i_L=i_{CM}+i_{DM},\qquad i_N=i_{CM}-i_{DM}.$$
I obtain the common-mode and differential-mode voltages from the line and neutral voltages:
$$V_{CM}=\frac{V_L+V_N}{2},\qquad V_{DM}=\frac{V_L-V_N}{2}.$$
For a three-phase solar inverter, I write the voltage balance for each phase as
$$\begin{aligned}
V_{AO}-V_{CM}&=Ri_A+L\frac{di_A}{dt},\\
V_{BO}-V_{CM}&=Ri_B+L\frac{di_B}{dt},\\
V_{CO}-V_{CM}&=Ri_C+L\frac{di_C}{dt}.
\end{aligned}$$
Summing the three equations gives the common-mode voltage of the solar inverter:
$$V_{CM}=\frac{V_A+V_B+V_C}{3}.$$
I also model the line impedance stabilization network because it provides a defined 50 Ω impedance for conducted EMI measurements. The network separates the equipment under test from the power source, and it provides a measurement port for the spectrum analyzer. I summarize the internal functions of the line impedance stabilization network in the following table.
| Component | Value | Function in the measurement of solar inverter noise |
|---|---|---|
| $L_1,L_2$ | 50 µH | Block high-frequency noise from the power source |
| $C_1,C_2$ | 1 µF | Provide a low-impedance path for high-frequency noise |
| $C_3,C_4$ | 0.1 µF | Couple the noise to the measurement port |
| $R_1,R_3$ | 1 kΩ | Discharge and stabilization |
| $R_2,R_4$ | 50 Ω | Provide the standard measurement impedance |
I use a current probe to separate common-mode and differential-mode noise. When the current probe encloses both line and neutral conductors, the differential-mode currents cancel, and the probe measures the common-mode current. When the probe encloses only one conductor and the reference ground is disconnected, the probe measures the differential-mode current. This separation is necessary because the solar inverter must satisfy different limits for different noise modes.
I verify the mechanism by simulation. I increase the switching frequency of the solar inverter and observe that the noise voltage increases. I add parasitic inductances and parasitic capacitances and observe that the high-frequency oscillation becomes stronger. I also compare ideal filter components with nonideal components. A real capacitor contains an equivalent series resistance and an equivalent series inductance, so its impedance is
$$Z_C=R_C+j\omega L_p+\frac{1}{j\omega C}.$$
A real inductor contains an equivalent series resistance and a parallel parasitic capacitance, so its impedance is
$$Z_L=\frac{R_P+j\omega L}{1-\omega^2LC_P+j\omega C_P R_P}.$$
The self-resonant frequency of the capacitor is
$$f_{0C}=\frac{1}{2\pi\sqrt{L_pC}},$$
and the self-resonant frequency of the inductor is
$$f_{0L}=\frac{1}{2\pi\sqrt{LC_P}}.$$
Above these frequencies, the component no longer behaves as intended. I therefore include component nonidealities in my solar inverter EMI filter models.
I now consider passive EMI filter design. A passive EMI filter is a two-port network. I define insertion loss as the ratio of the load power before filter insertion to the load power after filter insertion. Equivalently,
$$IL=10\log_{10}\left(\frac{P_1}{P_2}\right)=20\log_{10}\left(\frac{V_2′}{V_2}\right).$$
Using the two-port network representation, I write
$$\begin{aligned}
V_1&=AV_2+BI_2,\\
I_1&=CV_2+DI_2.
\end{aligned}$$
The load voltage after insertion is
$$V_2=\frac{V_S Z_L}{AZ_L+B+CZ_SZ_L+DZ_S}.$$
The insertion loss is therefore
$$IL=20\log_{10}\left|\frac{AZ_L+B+CZ_SZ_L+DZ_S}{Z_S+Z_L}\right|.$$
This expression shows that the insertion loss of a solar inverter EMI filter depends on the noise source impedance $Z_S$, the load impedance $Z_L$, and the filter ABCD parameters. If I assume that the noise source impedance is infinite or fixed at 50 Ω, I introduce a large error into the design of the solar inverter EMI filter. I therefore analyze the typical filter circuits and their transmission matrices.
| Filter type | Transmission matrix | Source impedance effect |
|---|---|---|
| Single inductor | $\begin{pmatrix}1&j\omega L\\0&1\end{pmatrix}$ | Higher source impedance reduces insertion loss |
| Single capacitor | $\begin{pmatrix}1&0\\j\omega C&1\end{pmatrix}$ | Lower source impedance reduces insertion loss |
| LC | $\begin{pmatrix}1-\omega^2LC&j\omega L\\j\omega C&1\end{pmatrix}$ | Inductor facing source, source impedance matters strongly |
| CL | $\begin{pmatrix}1&j\omega L\\j\omega C&1-\omega^2LC\end{pmatrix}$ | Capacitor facing source, source impedance matters strongly |
| CLC | $\begin{pmatrix}1-\omega^2LC_1&j\omega L\\j\omega(C_1+C_2-\omega^2LC_1C_2)&1-\omega^2LC_2\end{pmatrix}$ | Lower source impedance gives worst insertion loss |
| LCL | $\begin{pmatrix}1-\omega^2LC_2&j\omega L_1+j\omega L_2-j\omega^3L_1L_2C\\j\omega C&1-\omega^2L_1C\end{pmatrix}$ | Higher source impedance gives worst insertion loss |
I extract the common-mode and differential-mode noise source impedances of the solar inverter by insertion-loss methods. For the common-mode impedance, I insert a known common-mode inductor and measure the attenuation. The equivalent circuit gives
$$A_T=\frac{R_{loadCM}Z_{sCM}}{R_{loadCM}Z_{sCM}+R_{loadCM}Z_{fCM}+Z_{sCM}Z_{fCM}}.$$
Rearranging, I obtain
$$\left|Z_{sCM}+R_{loadCM}\right|=\frac{R_{loadCM}Z_{fCM}}{1-A_T}.$$
Because the impedance lies on a circle centered at $-R_{loadCM}$ with radius $r$, the maximum and minimum possible values are
$$|Z_{sCM}|_{MAX}=\frac{Z_{fCM}}{1-A_T}+R_{loadCM},$$
$$|Z_{sCM}|_{MIN}=\frac{Z_{fCM}}{1-A_T}-R_{loadCM}.$$
For the differential-mode impedance, I insert a known differential-mode capacitor. Under the condition that the load resistance is much larger than the source impedance, I write
$$A_T=1+\frac{Z_{sDM}}{Z_{fDM}}.$$
The maximum and minimum possible values are
$$|Z_{sDM}|_{MAX}=Z_{fDM}(1+A_T),$$
$$|Z_{sDM}|_{MIN}=Z_{fDM}(1-A_T).$$
I use these boundaries so that the solar inverter EMI filter remains effective even when the source impedance varies. I measured and calculated the AC-side and DC-side noise source impedances. The following tables summarize my results for the solar inverter.
| Frequency (kHz) | $A_{CM,req}$ | $Z_{sCM,max}$ (Ω) | $Z_{sCM,min}$ (Ω) |
|---|---|---|---|
| 150 | 17.78 | 72.80 | 39.47 |
| 200 | 11.22 | 139.56 | 106.22 |
| 300 | 10.00 | 226.00 | 192.66 |
| 400 | 10.00 | 295.78 | 262.44 |
| 500 | 6.31 | 608.00 | 574.67 |
| Frequency (kHz) | $A_{DM,req}$ | $Z_{sDM,max}$ (Ω) | $Z_{sDM,min}$ (Ω) |
|---|---|---|---|
| 150 | 28.18 | 30.93 | 28.81 |
| 200 | 33.50 | 27.60 | 26.00 |
| 300 | 17.78 | 9.95 | 8.89 |
| 400 | 18.20 | 7.68 | 6.88 |
| 500 | 17.78 | 6.00 | 5.37 |
| Frequency (kHz) | $A_{CM,req}$ | $Z_{sCM,max}$ (Ω) | $Z_{sCM,min}$ (Ω) |
|---|---|---|---|
| 150 | 3.16 | 39.35 | 10.65 |
| 200 | 2.51 | 52.60 | 2.60 |
| 300 | 2.04 | 87.13 | 27.13 |
| 400 | 1.67 | 128.62 | 78.62 |
| 500 | 1.20 | 197.67 | 147.67 |
| Frequency (kHz) | $A_{DM,req}$ | $Z_{sDM,max}$ (Ω) | $Z_{sDM,min}$ (Ω) |
|---|---|---|---|
| 150 | 25.19 | 103.28 | 52.90 |
| 200 | 17.78 | 91.38 | 55.83 |
| 300 | 16.79 | 120.89 | 87.31 |
| 400 | 25.19 | 234.02 | 183.64 |
| 500 | 19.95 | 226.63 | 186.73 |
Using these extracted boundaries, I design the common-mode and differential-mode EMI filters for the solar inverter. I select the common-mode capacitor according to the leakage current requirement. For a 220 V, 50 Hz grid, the leakage current must remain below the safety limit, so
$$I=2\pi f C U.$$
I choose a common-mode capacitor value that satisfies this condition. For the differential-mode capacitor, I select a value between 0.1 µF and 5 µF. I list the safety classes of differential-mode capacitors in the following table.
| Class | Peak voltage condition | Typical application | Test voltage |
|---|---|---|---|
| X1 | $V_P>1.2$ kV | Transient surge environment | 4 kV for small values |
| X2 | $V_P>1.2$ kV | General-purpose filtering | 1.4 kV |
For the LC filter, the common-mode insertion loss is
$$IL_{CM}=20\log_{10}\left(1+\frac{R_{loadCM}L_{CM}C_{CM}s^2+L_{CM}s}{R_{loadCM}+Z_{sCM}}\right).$$
In the high-frequency range, I approximate the insertion-loss curve as a straight line with a slope of 40 dB per decade. When the insertion loss is zero, the common-mode frequency is
$$f_{cm}=\frac{1}{2\pi}\frac{|Z_{sCM}|_{MAX}+R_{loadCM}}{R_{loadCM}L_{CM}C_{CM}}.$$
I also define the required corner frequency from the needed attenuation:
$$f_{ccm}=f_{Tcm}\times 10^{-\frac{V_{cm,req}}{40}}.$$
For the differential-mode filter, the corresponding frequency is
$$f_{dm}=\frac{1}{2\pi}\frac{|Z_{sDM}|_{MAX}+R_{loadDM}}{R_{loadDM}L_{DM}C_{DM}},$$
$$f_{cdm}=f_{Tdm}\times 10^{-\frac{V_{dm,req}}{40}}.$$
I equate the physical filter frequency to the required corner frequency and solve for the inductances. I summarize my first-pass design values for the solar inverter in the following table.
| Side | Mode | Capacitor | Inductor from infinite source impedance | Inductor from 50 Ω source impedance | Inductor from extracted source impedance |
|---|---|---|---|---|---|
| AC side | Common mode | $C_Y=0.01$ µF | 0.2 mH | 0.8 mH | 1.2 mH |
| AC side | Differential mode | $C_X=3.3$ µF | 1 µH | 1.33 µH | 5.4 µH |
| DC side | Common mode | $C_{DY}=0.01$ µF | 0.2 mH | 0.6 mH | 1.5 mH |
| DC side | Differential mode | $C_{DX}=3.3$ µF | 1 µH | 1.5 µH | 4.2 µH |
I compare three filter designs in simulation. Filter 1 assumes infinite noise source impedance. Filter 2 assumes 50 Ω noise source impedance. Filter 3 uses my extracted noise source impedance boundaries. In the AC-side common-mode and differential-mode spectra, Filter 3 suppresses the noise voltage to approximately 0.6 V and provides the strongest attenuation. On the DC side, Filter 3 also provides the best suppression and keeps the noise voltage near 3 V. The traditional designs may be smaller, but they require repeated trial-and-error adjustments, which increases the design cost of the solar inverter.
I built an experimental platform for a T-type three-level photovoltaic grid-connected solar inverter to verify the design. The main equipment parameters are listed below.
| Equipment | Model | Key parameter |
|---|---|---|
| Photovoltaic simulator | Chroma 62000H | 250 V, 30 kW |
| Grid-connected solar inverter | EA30KTSI | 30 kW |
| Line impedance stabilization network | ZN3770B | 150 kHz to 30 MHz |
| Spectrum analyzer | FPC1000 | 5 kHz to 1 GHz |
| Oscilloscope | DPO 2024B | 200 MHz, 1 GS/s |
| Current probe | TCP303 | 15 MHz, 0 A to 150 A |
With the proposed filter, the common-mode current of the solar inverter decreases from approximately 77 mA to 35 mA. The differential-mode current decreases from approximately 126 mA to 49 mA. The measured EMI spectrum decreases by about 30 dBµV. This confirms that the extracted noise source impedance method improves the practical suppression capability of the solar inverter EMI filter.
I then extend the design to a two-stage LC EMI filter and optimize its volume with a fast non-dominated sorting genetic algorithm. The conventional genetic algorithm uses selection, crossover, and mutation. I write the selection probability of an individual as
$$P_i=\frac{f_i}{\sum_{j=1}^{N}f_j}.$$
I use single-point or multi-point crossover, and I mutate genes with a specified mutation probability. However, a single-objective genetic algorithm cannot directly handle the trade-off between insertion loss and volume. It usually converts multiple objectives into one weighted objective. The weighting coefficients are subjective and can bias the optimization result.
The NSGA-II algorithm introduces fast non-dominated sorting and crowding distance. For each individual $i$, I define $n_i$ as the number of solutions that dominate $i$, and $S_i$ as the set of solutions dominated by $i$. In the first non-dominated front, all individuals have $n_i=0$. I then remove these individuals and reduce the domination count of their dominated solutions. The process continues until all individuals are ranked. I calculate crowding distance for individuals in the same front as
$$L[i]_d=\sum_{k=1}^{m}\left|f_k(i+1)-f_k(i-1)\right|.$$
I use the fast non-dominated sorting and crowding distance to select the next generation. This preserves both convergence and diversity. I summarize the NSGA-II procedure in the following table.
| Step | Operation | Purpose in solar inverter EMI filter design |
|---|---|---|
| 1 | Initialize population | Generate candidate filter parameters |
| 2 | Evaluate insertion loss and volume | Compute objective functions |
| 3 | Fast non-dominated sorting | Rank filter designs by Pareto dominance |
| 4 | Crowding distance | Maintain diversity in the Pareto front |
| 5 | Selection, crossover, mutation | Generate new filter parameters |
| 6 | Elitist replacement | Keep the best solar inverter filter designs |
I model the two-stage LC EMI filter. The filter contains two common-mode inductors, two differential-mode inductors, common-mode capacitors, and differential-mode capacitors. For the differential-mode equivalent circuit, I define
$$L_{d1}=2L_{DM1}+2L_{lk1},$$
$$L_{d2}=2L_{DM2}+2L_{lk2},$$
$$C_{d1}=2C_{DM1}+\frac{C_{CM1}}{2},$$
$$C_{d2}=2C_{DM2}+\frac{C_{CM2}}{2},$$
$$R_{loadDM}=2R_{LISN}.$$
For the common-mode equivalent circuit, I define
$$L_{C1}=L_{CM1}+\frac{L_{DM1}}{3},$$
$$L_{C2}=L_{CM2}+\frac{L_{DM2}}{3},$$
$$C_{C1}=3C_{CM1},$$
$$C_{C2}=3C_{CM2},$$
$$R_{loadCM}=\frac{R_{LISN}}{3}.$$
The differential-mode voltage at the load is
$$U_{DM}=\frac{(Z_{Ld1}\parallel Z_{Cd1}\parallel R_{loadDM})+Z_{Ld2}\parallel Z_{Cd2}}{(Z_{Ld1}\parallel Z_{Cd1}\parallel R_{loadDM})+Z_{Ld2}\parallel Z_{Cd2}+Z_{sDM}}V_{sDM}.$$
The common-mode voltage at the load is
$$U_{CM}=\frac{(Z_{Lc1}\parallel Z_{Cc1}\parallel R_{loadCM})+Z_{Lc2}\parallel Z_{Cc2}}{(Z_{Lc1}\parallel Z_{Cc1}\parallel R_{loadCM})+Z_{Lc2}\parallel Z_{Cc2}+Z_{sCM}}V_{sCM}.$$
I define the differential-mode objective as
$$\min IL_{DM}=20\log_{10}\left|\frac{Z_{loadDM}V_{sDM}}{(Z_{loadDM}+Z_{sDM})U_{DM}}\right|,$$
subject to
$$20\log_{10}\left|\frac{Z_{loadDM}V_{sDM}}{(Z_{loadDM}+Z_{sDM})U_{DM}}\right|\ge IL_{DM,req}.$$
I define the common-mode objective as
$$\min IL_{CM}=20\log_{10}\left|\frac{Z_{loadCM}V_{sCM}}{(Z_{loadCM}+Z_{sCM})U_{CM}}\right|,$$
subject to
$$20\log_{10}\left|\frac{Z_{loadCM}V_{sCM}}{(Z_{loadCM}+Z_{sCM})U_{CM}}\right|\ge IL_{CM,req}.$$
For the volume model, I fit the inductor volume as a function of inductance, rated current, and stored energy. I use
$$V_L=k_{L1}L+k_{L2}I+k_{L3}LI+k_{L4}.$$
I obtained the coefficients by fitting measured magnetic ring data. The fitted coefficients are $k_{L1}=0.9718$, $k_{L2}=0.2591$, $k_{L3}=0.2559$, and $k_{L4}=0.8364$. I list the magnetic ring data used for the volume model below.
| No. | Inductance (mH) | Volume (cm³) | Rated current (A) |
|---|---|---|---|
| 1 | 0.18 | 0.82 | 1 |
| 2 | 0.30 | 0.91 | 1 |
| 3 | 0.68 | 1.25 | 1 |
| 4 | 1.8 | 2.47 | 1 |
| 5 | 0.02 | 1.82 | 5 |
| 6 | 0.12 | 3.07 | 5 |
| 7 | 0.2 | 3.96 | 5 |
| 8 | 0.6 | 6.61 | 5 |
| 9 | 1.2 | 11.07 | 5 |
| 10 | 2.2 | 18.25 | 5 |
| 11 | 0.05 | 6.52 | 10 |
| 12 | 0.18 | 9.23 | 10 |
| 13 | 0.33 | 13.80 | 10 |
| 14 | 0.8 | 25.85 | 10 |
| 15 | 1.5 | 39.52 | 10 |
| 16 | 1.8 | 52.60 | 10 |
| 17 | 0.02 | 8.24 | 15 |
| 18 | 0.12 | 12.96 | 15 |
| 19 | 0.2 | 17.40 | 15 |
| 20 | 0.3 | 25.10 | 15 |
| 21 | 0.6 | 37.25 | 15 |
| 22 | 0.8 | 55.86 | 15 |
I set the population size to 150, the decision variable bounds to $[0.0001,0.02]$, the number of variables to two, and the maximum number of iterations to 150. I initialize the population as
$$X_i(0)=X_{min}+\operatorname{rand}(1,nVar)(X_{max}-X_{min}).$$
I evaluate each individual with
$$Y_i(0)=\operatorname{MOP}(X_i(0)).$$
I use a crossover probability of 0.8 and a mutation probability of 0.2. For crossover, I write
$$O_1=P_1X_1+P_2X_2+P_3X_3,$$
$$O_2=P_2X_1+P_1X_2+P_3X_3.$$
For mutation, I write
$$X_i(ind)=X_{min}+(X_{max}-X_{min})\operatorname{rand}.$$
The optimization returns a Pareto front of filter volumes and insertion losses. The optimized differential-mode EMI filter volume is approximately 28.73 cm³, with differential-mode inductances of 3.6 µH and 1.9 µH. The optimized common-mode EMI filter volume is approximately 36.57 cm³, with common-mode inductances of 0.3 mH and 0.2 mH. I compare the optimized and pre-optimized values below.
| Design stage | Filter component | Parameter | Total volume |
|---|---|---|---|
| Before optimization | Common-mode inductor | 1.2 mH | 70.68 cm³ |
| Before optimization | Differential-mode inductor | 5.4 µH | 6.51 cm³ |
| After optimization | Common-mode inductors | 0.3 mH, 0.2 mH | 36.57 cm³ |
| After optimization | Differential-mode inductors | 3.6 µH, 1.9 µH | 6.31 cm³ |
I simulate the two-stage filter and compare it with a single-stage filter and with no filter. The grid current remains stable, and the two-stage filter suppresses the common-mode and differential-mode noise to nearly the same level as the single-stage filter while using a smaller total volume. In the experimental test, the common-mode current decreases from 77 mA to 43 mA, the differential-mode current decreases from 126 mA to 35 mA, and the measured EMI spectrum decreases by about 25 dBµV. These results show that the NSGA-II optimized two-stage EMI filter is effective for the solar inverter.
I conclude that the conducted EMI problem in a solar inverter must be treated with both circuit-level modeling and measurement-based parameter extraction. The switching behavior of the power devices produces high $dv/dt$ and $di/dt$, and these transitions excite the parasitic elements of the solar inverter. The common-mode path and differential-mode path have different impedances and different attenuation requirements. A solar inverter EMI filter designed with an assumed infinite source impedance or a fixed 50 Ω source impedance cannot accurately represent the real operating condition. By extracting the common-mode and differential-mode noise source impedances, I obtain the worst-case boundaries for the solar inverter and use them in the filter design. The resulting filter achieves strong attenuation over the 150 kHz to 30 MHz range.
I further improve the design by using a two-stage LC filter and the NSGA-II algorithm. The insertion loss objective ensures that the solar inverter meets the required attenuation, while the volume objective reduces the magnetic component cost. The fast non-dominated sorting and crowding distance of NSGA-II give a set of trade-off solutions. From this set, I select the parameters that satisfy the standard with sufficient margin and minimize the volume. The experimental results confirm that the optimized EMI filter reduces both common-mode and differential-mode noise in the solar inverter. In future work, I will extend the model to include grid impedance variation, weak-grid conditions, and more accurate high-frequency source impedance extraction so that the solar inverter EMI filter can be designed with even higher confidence.