In the context of achieving carbon neutrality goals, the integration of large-scale photovoltaic (PV) bases into power systems via voltage source converter high-voltage direct current (VSC-HVDC) transmission has become a critical solution for addressing geographical imbalances between generation resources and load centers. However, these systems, characterized by high penetration of renewable energy and power electronics, extensive AC networks, and long electrical distances, face unique challenges during fault recovery. One such issue is the DC-side voltage dip in solar inverters, a novel power quality problem in modern power systems. I analyze this phenomenon by examining the imbalance between PV array output power and inverter output power, considering the voltage-power characteristics of PV arrays and the control strategies of solar inverters. This analysis reveals that the movement of the PV array operating point and changes in inverter control strategies during fault recovery are the root causes of DC-side voltage dips. I further classify four operating conditions based on the PV array operating point relative to the maximum power point (MPP) and the inverter control mode, detailing the DC voltage evolution in each case. The findings are validated through simulations, providing insights for improving system stability.
The voltage-power characteristics of PV arrays are fundamental to understanding power imbalances. The output current of a PV array, \( i_{pv} \), and voltage, \( u_{pv} \), follow a nonlinear relationship described by:
$$ i_{pv} = i_g – i_0 \left[ \exp\left(\frac{q (u_{pv} + i_{pv} R_{sr})}{n k T_c}\right) – 1 \right] – \frac{u_{pv} + i_{pv} R_{sr}}{R_{sh}} $$
where \( i_g \) is the photocurrent dependent on solar irradiance and temperature, \( i_0 \) is the reverse saturation current, \( R_{sr} \) and \( R_{sh} \) are series and shunt resistances representing losses, \( n \) is the diode ideality factor, \( k \) is Boltzmann’s constant, \( T_c \) is the cell temperature, and \( q \) is the electron charge. The output power \( P_{pv} \) is given by:
$$ P_{pv} = u_{pv} i_{pv} $$
This relationship results in a characteristic curve where power increases with voltage to the left of the MPP and decreases to the right, as summarized in Table 1. Under normal conditions, solar inverters use maximum power point tracking (MPPT) to operate near the MPP, but disturbances can shift the operating point, affecting power balance.
| Region | Voltage-Power Relationship | Typical Operation |
|---|---|---|
| Left of MPP | \( \frac{dP_{pv}}{du_{pv}} > 0 \) | Power increases with voltage |
| Right of MPP | \( \frac{dP_{pv}}{du_{pv}} < 0 \) | Power decreases with voltage |
Solar inverters play a crucial role in regulating power flow. In normal operation, solar inverters employ dual-loop control with DC voltage and reactive power as targets, enabling decoupled control of active and reactive power. The active power output \( P_g \) is expressed as:
$$ P_g = \frac{3}{2} u_d i_d $$
where \( u_d \) is the d-axis voltage at the point of common coupling (PCC), and \( i_d \) is the d-axis current. The control structure includes MPPT and DC voltage outer loops, which adjust \( i_d \) to maintain power balance. However, during AC voltage sags below a threshold (e.g., 0.9 p.u. per standards), solar inverters switch to low-voltage ride-through (LVRT) mode, prioritizing reactive current injection. The reactive current reference \( I_{q}^{\text{ref}} \) follows:
$$ I_{q}^{\text{ref}} = I_{q0} + \Delta I_q $$
with \( \Delta I_q \) determined by voltage deviation, such as \( \Delta I_q = 1.5 (0.9 – u_g) I_N \) for \( u_g < 0.9 \) p.u., where \( I_N \) is the rated current. The active current is then constrained by the maximum current limit \( I_{\text{max}} \):
$$ I_{d}^{\text{ref}} = \min(I_{d1}, \sqrt{I_{\text{max}}^2 – (I_{q}^{\text{ref}})^2}) $$
This reduces active power output during LVRT, potentially leading to power imbalances. The output characteristics of solar inverters under different controls are summarized in Table 2.
| Control Mode | Active Power Priority | Reactive Power Priority | Power Constraints |
|---|---|---|---|
| Normal (DC voltage control) | High (MPPT-based) | Low (fixed Q reference) | Limited by MPPT and capacity |
| LVRT | Reduced (current-limited) | High (voltage support) | \( P_g \leq \sqrt{S_{\text{rated}}^2 – Q_g^2} \) |
The power balance between the PV array and the solar inverter directly influences the DC-side voltage. The dynamics are governed by:
$$ C U_{dc} \frac{dU_{dc}}{dt} = P_{pv} – P_g $$
where \( C \) is the DC-link capacitance, \( U_{dc} \) is the DC voltage, \( P_{pv} \) is the PV array output power, and \( P_g \) is the inverter output power. If \( P_g > P_{pv} \), the capacitor discharges, causing \( U_{dc} \) to fall; if \( P_g < P_{pv} \), the capacitor charges, raising \( U_{dc} \). This relationship highlights how imbalances during fault recovery can lead to voltage dips, especially when solar inverters undergo control transitions.
To analyze the DC-side voltage dip mechanism, I define four operating conditions based on the PV array operating point (left or right of MPP) and the solar inverter control mode (normal or LVRT). The evolution of DC voltage in each condition is derived from the power balance equation. For instance, in Condition 1 (PV array right of MPP, normal control), a decrease in \( P_g \) causes \( U_{dc} \) to rise, shifting the operating point further right until MPPT restores balance. In contrast, Condition 4 (PV array left of MPP, LVRT mode) is critical for voltage dips: if \( P_g \) exceeds \( P_{pv} \) during fault recovery, \( U_{dc} drops, and the solar inverter cannot adjust due to LVRT constraints, sustaining the dip until normal control resumes. The conditions are summarized in Table 3.
| Condition | PV Operating Point | Inverter Control | DC Voltage Response | Key Equations |
|---|---|---|---|---|
| 1 | Right of MPP | Normal | Increases and recovers via MPPT | \( \frac{dU_{dc}}{dt} = \frac{P_{pv} – P_g}{C U_{dc}} \), with \( P_{pv} \) decreasing as \( U_{dc} \) rises |
| 2 | Left of MPP | Normal | Decreases and recovers via MPPT | \( \frac{dU_{dc}}{dt} = \frac{P_{pv} – P_g}{C U_{dc}} \), with \( P_{pv} \) increasing as \( U_{dc} \) falls initially |
| 3 | Right of MPP | LVRT | Remains elevated | \( P_g < P_{pv} \), leading to \( \frac{dU_{dc}}{dt} > 0 \) sustained |
| 4 | Left of MPP | LVRT | Dips and persists | \( P_g > P_{pv} \), causing \( \frac{dU_{dc}}{dt} < 0 \) without recovery until LVRT exits |
The transition between conditions during fault recovery is key to voltage dips. For example, if a solar inverter starts in Condition 1 and \( P_g \) surges post-fault, it may shift to Condition 2 and then to Condition 4 if LVRT activates, resulting in a prolonged dip. The critical factor is the interplay between the PV array’s power-voltage curve and the solar inverter’s control limitations. Mathematical analysis shows that in Condition 4, the DC voltage stabilizes at a lower value \( U_{dc}^{\text{low}} \) where \( P_{pv}(U_{dc}^{\text{low}}) = P_g^{\text{LVRT}} \), with \( P_g^{\text{LVRT}} \) constrained by current limits. This equilibrium point explains why voltage dips occur in solar inverters located far from faults, where AC voltage remains high initially, delaying LVRT activation until after the operating point moves left of MPP.
Simulation studies based on a large-scale PV base VSC-HVDC system model confirm the mechanism. The system includes multiple PV plants with varying electrical distances to the sending-end converter. A three-phase fault at the converter AC bus causes some solar inverters to experience DC voltage dips post-recovery, particularly those at longer distances. For instance, inverters in PV1 and PV2 exhibit dips to 0.60 p.u. and 0.53 p.u., respectively, due to transitions into Condition 4, while closer inverters like PV4 remain in Condition 3 with higher DC voltages. The simulations validate that power imbalances during recovery, combined with control mode switches, are responsible for the dips in solar inverters.
In conclusion, I have demonstrated that DC-side voltage dips in solar inverters after fault recovery stem from power imbalances exacerbated by PV array operating point shifts and inverter control changes. The four-condition framework provides a comprehensive understanding, with Condition 4 being the primary culprit for dips. This analysis underscores the need for adaptive control strategies in solar inverters to mitigate such issues, such as limiting active power recovery rates or enhancing LVRT schemes. Future work will focus on refining inverter controls to prevent entry into Condition 4, ensuring stable operation in large-scale PV systems. The insights gained are vital for advancing the reliability of renewable-integrated power grids.