In my research on advanced power electronics for renewable energy systems, I focus on the efficiency optimization and neutral point potential balancing of Active Neutral-Point-Clamped (ANPC) three-level inverters. These inverters are widely used in grid-connected applications, including various types of solar inverters, due to their low harmonic distortion, high efficiency, and superior loss distribution. The increasing penetration of photovoltaic and energy storage systems demands highly reliable and efficient power conversion topologies. Among the many types of solar inverters, multilevel inverters such as the ANPC topology stand out because they reduce voltage stress on switching devices and improve output waveform quality. In this work, I propose a dynamic modulation method based on zero-sequence voltage injection combined with a proportional-integral (PI) feedback controller for neutral point balancing. The method reconstructs the composite modulation waves by dynamically superimposing optimized zero-sequence components onto the three-phase reference signals, achieving specific phase interval clamping of switches and suppressing DC-link capacitor voltage fluctuations. I validate the proposed strategy through simulations on a three-level ANPC inverter model.
The motivation for this study arises from the fact that conventional continuous pulse-width modulation (CPWM) strategies, while simple to implement, suffer from high switching losses, especially in high-power applications. For various types of solar inverters, minimizing losses is critical to improve overall system efficiency and reduce thermal management requirements. Discontinuous pulse-width modulation (DPWM) offers a promising solution by clamping certain phases to the positive or negative DC bus for specific intervals within each fundamental cycle, thereby reducing the effective switching frequency and associated losses. However, integrating DPWM with neutral point balancing in ANPC inverters is challenging because the zero-sequence injection needed for clamping affects the neutral point current. My work addresses this gap by designing a closed-loop control that adjusts the zero-sequence component based on the measured voltage difference across the DC-link capacitors, ensuring both loss reduction and voltage balance.
1. ANPC Three-Level Inverter Topology and Operation
The ANPC three-level inverter extends the conventional Neutral-Point-Clamped (NPC) topology by adding active switches in the clamping path. This modification allows independent control of the neutral point current and improves loss distribution among the devices. The main power circuit of one phase leg consists of six switching devices (Tx1 to Tx6) and two clamping capacitors C1 and C2, where x denotes phases a, b, c. The inverter can generate three output voltage levels: +Udc/2 (P state), 0 (O state), and –Udc/2 (N state). The table below summarizes the switching states for phase a:
| State | Tx1 | Tx2 | Tx3 | Tx4 | Tx5 | Tx6 | Output Voltage |
|---|---|---|---|---|---|---|---|
| P | 1 | 1 | 0 | 0 | 0 | 1 | +Udc/2 |
| OU1 | 0 | 1 | 0 | 0 | 1 | 0 | 0 |
| OU2 | 0 | 1 | 0 | 1 | 1 | 0 | 0 |
| OL1 | 0 | 0 | 1 | 0 | 0 | 1 | 0 |
| OL2 | 1 | 0 | 1 | 0 | 0 | 1 | 0 |
| N | 0 | 0 | 1 | 1 | 1 | 0 | –Udc/2 |
The zero state (O) can be realized by four different switching combinations, which provide flexibility in selecting commutation paths. This feature is crucial for loss balancing and neutral point current control. The two main commutation categories are short commutation paths (e.g., P↔OU1, N↔OL1) and long commutation paths (e.g., P↔OL1, N↔OU1). By appropriately selecting the zero-state configuration, one can control the direction of the neutral point current without affecting the output voltage. This capability is particularly valuable for maintaining neutral point balance in various types of solar inverters, where the DC-link is formed by two series-connected capacitors.
2. Dynamic Zero-Sequence Injection for DPWM
The DPWM strategy I employ is based on the injection of a zero-sequence voltage into the three-phase modulation signals. The goal is to clamp each phase to either the positive or negative DC bus for a specific 60° interval per half-cycle, thereby reducing the number of switching transitions. Among the many DPWM variants, DPWM1 clamps the phase to P in the range 60°–120° and to N in the range 240°–300°. This clamping pattern is favorable for unity power factor applications, which is common in many types of solar inverters.
The zero-sequence voltage is computed using the following formula:
$$
u_0 =
\begin{cases}
-1 – u^*_{x\min}, & \text{if } |u^*_{x\max}| < |u^*_{x\min}| \\
1 – u^*_{x\max}, & \text{if } |u^*_{x\max}| > |u^*_{x\min}|
\end{cases}
$$
where \(u^*_{x\max}\) and \(u^*_{x\min}\) are the maximum and minimum values of the per-unit three-phase reference voltages, respectively. After adding \(u_0\) to each original reference \(u_{ref}\), the final modulation waves \(u_{sinref}\) are obtained. The effective switching frequency is reduced to two-thirds of the carrier frequency, which directly lowers the switching losses by approximately 33%. This reduction is significant for high-power types of solar inverters where thermal constraints are stringent.
To dynamically adapt the zero-sequence component for neutral point balancing, I incorporate a PI controller that processes the voltage difference \(\Delta U = U_{c1} – U_{c2}\) across the DC-link capacitors. The output of the PI controller, \(U_{pi}\), is added to the zero-sequence voltage before injection. The overall modulation process is expressed as:
$$
u^*_a = u_a + u_0 + U_{pi}
$$
where \(u_a\) is the original per-unit reference for phase a. This closed-loop adjustment ensures that the neutral point potential is regulated to zero regardless of load conditions or modulation index variations. The block diagram in the inserted figure illustrates this principle.
The figure above shows a typical hardware implementation for a 15 kW solar inverter with energy storage, which belongs to one of the emerging types of solar inverters that benefit from multilevel topologies. In my proposed scheme, the DSP or microcontroller calculates the zero-sequence voltage and PI correction in real time, generating the switching signals for the six active switches per phase. The algorithm is computationally efficient because it avoids complex space vector sector identification and trigonometric calculations, making it suitable for low-cost controllers used in commercial types of solar inverters.
3. Neutral Point Balancing Control
Neutral point imbalance in ANPC inverters leads to increased harmonic distortion in the output voltage and may cause overvoltage stress on the capacitors or switches. My balancing strategy exploits the fact that different zero-state configurations produce different neutral point currents. For the DPWM1 clamping pattern, the neutral point current depends on the phase with the clamped voltage. By adding the PI output \(U_{pi}\) to the zero-sequence voltage, I effectively shift the clamping intervals in a way that injects or extracts charge from the neutral point to equalize the two capacitor voltages.
The relationship between the zero-sequence voltage and the neutral point current can be derived analytically. For a three-phase system with balanced sinusoidal references, the average neutral point current over one carrier period is:
$$
i_{\text{np}} = i_a \cdot d_a + i_b \cdot d_b + i_c \cdot d_c
$$
where \(d_a, d_b, d_c\) are the duty cycles relative to the neutral point (i.e., the fraction of time the phase is in the O state). Under DPWM, one phase is clamped, and thus its duty cycle for the O state becomes zero during the clamping interval. The zero-sequence injection modifies the duty cycles of the remaining two phases. The PI controller adjusts \(U_{pi}\) to make the dc component of \(i_{\text{np}}\) zero, thereby balancing the capacitors.
I also derived a small-signal model for the neutral point voltage dynamics:
$$
\frac{d \Delta U}{dt} = \frac{1}{C} i_{\text{np}}
$$
where \(C = C_1 = C_2\) is the capacitance. The PI controller gains are tuned to achieve a settling time of about 0.1 s with minimal overshoot. The control law is:
$$
U_{pi} = K_p \Delta U + K_i \int \Delta U \, dt
$$
The values of \(K_p\) and \(K_i\) are selected based on the DC-link capacitor size and the rated power. In my simulations, I used \(K_p = 0.01\) and \(K_i = 5\).
4. Simulation Verification
To validate the proposed strategy, I built a detailed simulation model in MATLAB/Simulink using the parameters listed in the following table:
| Parameter | Symbol | Value |
|---|---|---|
| DC-link voltage | \(U_{dc}\) | 750 V |
| DC-link capacitors | \(C_1, C_2\) | 5 mF |
| Output line voltage (rms) | \(U_{out}\) | 380 V |
| Output current (rms) | \(I_{out}\) | 76 A |
| Filter inductor L1 | \(L_1\) | 5 mH |
| Filter inductor L2 | \(L_2\) | 500 μH |
| Filter capacitor | \(C_f\) | 425 μF |
| Switching frequency | \(f_s\) | 10 kHz |
The carrier-based DPWM1 was implemented with the proposed zero-sequence injection and PI balancing. Fig. 4 (in the original paper) shows the modulation waveforms where clamping occurs in the 60°–120° and 240°–300° intervals. The output line currents were measured and analyzed for total harmonic distortion (THD). The THD was found to be 1.2%, which is well below the IEEE 519 standard limits for grid-connected types of solar inverters.
The most critical test was the neutral point balancing response. In the simulation, the inverter started with an initial imbalance: \(U_{c1}=400 V\) and \(U_{c2}=350 V\). The balancing controller was enabled at \(t=3 s\). The results show that the capacitor voltages converged to the setpoint of 375 V within 0.1 s, with negligible steady-state error. The dynamic response is fast enough to handle sudden load steps or unbalanced grid conditions, which are common in real-world applications of types of solar inverters.
I also compared the switching losses between the proposed DPWM and conventional CPWM. Using the same switching frequency of 10 kHz, the DPWM reduced the number of switching transitions by 33%, leading to approximately 33% lower switching losses. This reduction directly improves the overall efficiency of the inverter, which is a key performance metric for all types of solar inverters.
The simulation results confirm that the proposed method not only reduces losses but also maintains high output quality. The output current waveform is nearly sinusoidal, and the neutral point voltage ripple is less than 2% of the DC-link voltage. These characteristics make the strategy suitable for high-power applications where reliability and efficiency are paramount.
5. Conclusion
In this work, I have presented a dynamic zero-sequence injection DPWM strategy with integrated neutral point balancing control for ANPC three-level inverters. The method leverages the flexibility of the ANPC topology to combine loss reduction and capacitor voltage equalization in a simple carrier-based implementation. The key contributions are:
- A closed-form expression for zero-sequence voltage adapted from DPWM1, dynamically adjusted by a PI controller based on capacitor voltage difference.
- Reduction of effective switching frequency to two-thirds of the carrier frequency, decreasing switching losses by 33% without compromising output waveform quality.
- Fast neutral point balancing (< 0.1 s settling time) with minimal overshoot, verified through simulation.
- Compatibility with low-cost digital controllers, making it attractive for commercial types of solar inverters, including residential, commercial, and utility-scale systems.
The proposed scheme is particularly beneficial for grid-tied inverters where efficiency standards are increasingly stringent. Future work will focus on experimental validation on a hardware prototype and extension to other multilevel topologies such as T-type and five-level ANPC. As the demand for high-power density continues to grow, I believe that dynamic modulation methods like the one described here will play a vital role in the next generation of types of solar inverters.
The simulation results demonstrate that the strategy achieves a good trade-off between complexity and performance. By incorporating the neutral point feedback into the zero-sequence injection, I eliminate the need for additional balancing circuits or complex space vector modulation. This simplicity is a major advantage when deploying the algorithm in mass-produced types of solar inverters where cost and reliability are critical.
In summary, my research provides a practical solution for two of the most challenging issues in ANPC inverters: efficiency and neutral point stability. The use of DPWM with dynamic zero-sequence injection offers a clear path to improving the performance of types of solar inverters in modern energy systems.