I designed and evaluated a single-phase photovoltaic off-grid inverter based on an STM32F103-series microcontroller. The work began from a simple observation: energy demand keeps rising, while conventional fossil resources are limited and their use creates environmental pressure such as acid rain, greenhouse effects, and smog. Solar energy is clean, widely available, and effectively inexhaustible. For remote areas, emergency power, portable systems, and small stand-alone loads, solar inverters are among the most practical ways to convert photovoltaic dc power into usable ac power. My objective was to build a small-power solar inverter that could deliver approximately 220 V, 50 Hz alternating current from a low-voltage dc source, while keeping the hardware modular, the control strategy implementable on a low-cost microcontroller, and the output waveform suitable for ordinary loads.
Background and Motivation
Since the industrial revolution, energy consumption has been tightly coupled with economic growth. Stable energy supply supported rapid development, but over-reliance on non-renewable resources has produced shortages and environmental damage. Among clean alternatives, photovoltaic generation has attracted attention because it converts sunlight directly into electricity without rotating machinery and without fuel combustion. The inverter is a critical part of any photovoltaic system because the photovoltaic array and battery bank provide dc power, while most practical loads require ac power. Therefore, the performance of solar inverters directly affects conversion efficiency, power quality, reliability, and user safety.
I focused on off-grid photovoltaic systems rather than grid-connected systems. An off-grid solar inverter must operate independently of the utility network. It must manage dc input from a photovoltaic array or battery, boost the voltage, invert the dc link into ac, filter switching harmonics, and protect itself under abnormal conditions. This makes the design both a power-electronics problem and an embedded-control problem. The STM32F103C8T6 was selected because it contains advanced timers, 12-bit analog-to-digital converters, multiple communication interfaces, and enough computational power to generate sinusoidal pulse-width modulation while executing voltage and current control loops.
Global and Regional Development Context
Many countries have promoted photovoltaic generation through long-term programs and incentives. Japan, the European Union, and the United States have invested heavily in solar research, manufacturing, and deployment. Large photovoltaic power stations and rooftop programs have demonstrated that solar energy can supply significant power. In parallel, the market for solar inverters has become globally competitive, with international companies dominating high-power and high-reliability segments. In China, photovoltaic manufacturing and installation have expanded rapidly, and domestic companies have increased their market share. Nevertheless, small off-grid solar inverters still require careful design because they often operate with low dc input, wide load variation, and limited cooling.
The distribution of solar resources is uneven. I summarized the common solar resource classification to show why off-grid photovoltaic systems are attractive in many regions.
| Resource Class | Annual Radiation (MJ/m²) | Annual Radiation (kWh/m²) | Average Daily Radiation (kWh/m²) |
|---|---|---|---|
| Most abundant | ≥ 6300 | ≥ 1750 | ≥ 4.8 |
| Very abundant | 5040–6300 | 1400–1750 | 3.8–4.8 |
| Abundant | 3780–5040 | 1050–1400 | 2.9–3.8 |
| General | < 3780 | < 1050 | < 2.9 |
Regions with annual radiation above 5040 MJ/m² and more than 2200 sunshine hours are especially suitable for photovoltaic generation. This resource availability supports the development of solar inverters for remote homes, communication stations, street lighting, fishing boats, islands, and emergency power supplies.
Photovoltaic System Classification
Photovoltaic systems can be classified as off-grid, grid-connected, and hybrid. An off-grid system typically includes a photovoltaic array, battery storage, a charge controller, and an inverter. It can supply dc loads directly or ac loads through solar inverters. A grid-connected system feeds power into the public grid through a grid-tied inverter and usually does not store energy. A hybrid system combines storage, renewable generation, and sometimes a backup generator. Because my design targets stand-alone operation, I concentrated on the off-grid architecture.
| System Type | Main Components | Typical Use | Key Challenge |
|---|---|---|---|
| Off-grid | PV array, battery, controller, inverter | Remote areas, portable power, emergency supply | Energy storage and load regulation |
| Grid-connected | PV array, dc boost, grid-tied inverter | Residential and utility-scale generation | Grid synchronization and anti-islanding |
| Hybrid | PV, battery, inverter, generator or grid | Reliable microgrids and critical loads | Energy management and cost |
Photovoltaic Cell Modeling
I modeled the photovoltaic cell before designing the power stage because the source characteristics determine the operating point of the solar inverter. A photovoltaic cell behaves as a current source in parallel with a diode, a shunt resistance, and a series resistance. The photocurrent is generated when photons create electron-hole pairs in the semiconductor junction. The equivalent circuit leads to the following relationships:
$$I_L = I_{ph} – I_D – I_{sh}$$
$$I_D = I_o \left[ \exp\left( \frac{q(U_{oc} + R_s I_L)}{nKT} \right) – 1 \right]$$
$$I_{sh} = \frac{U_{oc} + R_s I_L}{R_{sh}}$$
$$I_L = I_{ph} – I_o \left[ \exp\left( \frac{q(U_{oc} + R_s I_L)}{nKT} \right) – 1 \right] – \frac{U_{oc} + R_s I_L}{R_{sh}}$$
Here, \(I_{ph}\) is the photocurrent, \(I_o\) is the diode reverse saturation current, \(q\) is the electron charge, \(n\) is the diode ideality factor, \(K\) is Boltzmann’s constant, \(T\) is the absolute temperature, \(R_s\) is the series resistance, and \(R_{sh}\) is the shunt resistance. In an ideal approximation, the series resistance is very small and the shunt resistance is very large, so the model simplifies to:
$$I_L = I_{ph} – I_o \left[ \exp\left( \frac{q U_{oc}}{nKT} \right) – 1 \right]$$
The output power is:
$$P = U_L I_L$$
Two figures of merit are important for solar inverters: the fill factor and the conversion efficiency.
$$FF = \frac{P_{max}}{V_{oc} I_{sc}}$$
$$\eta_s = \frac{P_{max}}{P_{in}} \times 100\%$$
I implemented the photovoltaic model in MATLAB/Simulink and tested it under different irradiance and temperature values. The simulation parameters are summarized below.
| Parameter | Meaning | Value Used in Simulation |
|---|---|---|
| \(V_{oc1}\) | Open-circuit voltage | As specified by the PV module model |
| \(I_{sc1}\) | Short-circuit current | As specified by the PV module model |
| \(V_{m1}\) | Maximum-power voltage | Rated module value |
| \(I_{m1}\) | Maximum-power current | Rated module value |
| \(T_{ref}\) | Reference temperature | 25 °C |
| \(S_{ref}\) | Reference irradiance | 1000 W/m² |
| \(a\) | Short-circuit current temperature coefficient | Module-dependent |
| \(b\) | Open-circuit voltage temperature coefficient | Module-dependent |
When irradiance increases while temperature is held at 25 °C, the short-circuit current increases significantly, the open-circuit voltage increases slightly, and the maximum output power rises. When temperature increases while irradiance is held at 1000 W/m², the short-circuit current changes only slightly, while the open-circuit voltage and maximum power decrease. This confirmed that maximum power point tracking must account for both irradiance and temperature in practical solar inverters.
Inverter Topologies
I reviewed three common topologies for photovoltaic off-grid inverters: low-frequency isolated, high-frequency isolated, and non-isolated. A low-frequency isolated inverter uses a line-frequency transformer after the inverter bridge. It is simple and provides galvanic isolation, but the transformer is bulky and lossy. A high-frequency isolated inverter uses a high-frequency transformer in the dc-dc stage, reducing size and weight while maintaining isolation. A non-isolated inverter omits the transformer and uses a boost converter followed by an inverter bridge. It is compact and efficient but lacks galvanic isolation, so common-mode noise and safety issues must be managed carefully.
| Topology | Advantages | Disadvantages | Suitability |
|---|---|---|---|
| Low-frequency isolated | Simple design, strong isolation | Large size, heavy, higher losses | Higher-power industrial systems |
| High-frequency isolated | Small size, light weight, isolation | Possible magnetic bias, more complex transformer design | Compact off-grid solar inverters |
| Non-isolated | Compact, efficient, low cost | No isolation, common-mode noise risk | Cost-sensitive grid-tied or compact systems |
I selected a high-frequency isolated topology for my solar inverter. It combines a boost stage, a high-frequency transformer, a rectifier, and a full-bridge inverter. This choice keeps the system portable and safe while providing voltage step-up from a low dc source to a high dc link.
Control Strategy
For the inverter stage, I used a voltage and current double closed-loop PI controller. The outer voltage loop regulates the output voltage, while the inner current loop regulates the inductor current. The inner loop improves dynamic response and stability. The general error is:
$$e(t) = r(t) – y(t)$$
The analog PID control law is:
$$u(t) = K_p e(t) + \frac{K_p}{T_i} \int_0^t e(t) dt + K_p T_d \frac{de(t)}{dt}$$
For digital implementation, the position-form PID algorithm is:
$$u_k = K_p e_k + K_i \sum_{j=0}^{k} e_j + K_d (e_k – e_{k-1})$$
I chose the incremental PID form because it requires fewer computations and is more robust when the actuator holds its last position after a fault. The incremental form is:
$$\Delta u_k = A e_k – B e_{k-1} + C e_{k-2}$$
$$A = K_p \left(1 + \frac{T}{T_i} + \frac{T_d}{T}\right)$$
$$B = K_p \left(1 + \frac{2T_d}{T}\right)$$
$$C = K_p \frac{T_d}{T}$$
In my double-loop structure, the outer voltage controller produces a reference current. The inner current controller compares that reference with the measured inductor current and generates the modulation signal. I implemented the controller in Simulink and tested it with a dc link of 360 V, an inductor of 1 mH, a capacitor of 6 μF, and a load of 4 Ω. The voltage-loop gains were set to \(K_p = 0.01\), \(K_i = 3\), and the current-loop gains were \(K_p = 0.03\), \(K_i = 6\). The simulation produced a 311 V peak output at 50 Hz, with voltage and current nearly in phase. The output waveform had small fluctuation and high steady-state accuracy, confirming that the double-loop PI strategy is feasible for my solar inverter.
SPWM Modulation
Sinusoidal pulse-width modulation is the core modulation method in my design. It is based on the area-equivalence principle: a sinusoidal waveform can be replaced by a sequence of rectangular pulses whose areas are equal over each switching period. I used a sinusoidal modulation wave and a triangular carrier. The modulation index is:
$$m = \frac{U_{sm}}{U_{cm}}$$
The carrier ratio is:
$$N = \frac{f_c}{f_s}$$
For unipolar SPWM, the average output voltage over a switching period is:
$$\bar{u}_o = U_d D(t)$$
$$D(t) = \frac{u_s(t)}{U_{cm}}$$
$$\bar{u}_o = \frac{U_d}{U_{cm}} u_s(t)$$
If \(u_s(t) = U_{sm}\sin(\omega t)\), then:
$$\bar{u}_o = m U_d \sin(\omega t)$$
For bipolar SPWM, the duty cycle is:
$$D(t) = \frac{1}{2} \left[1 + \frac{u_s(t)}{U_{cm}}\right]$$
The average output becomes:
$$\bar{u}_o = \frac{U_d}{U_{cm}} u_s(t)$$
Unipolar SPWM has an advantage because the output voltage does not contain even harmonics, and the effective switching frequency seen by the output filter can be doubled. This reduces filter size and improves waveform quality. I therefore selected unipolar SPWM for my solar inverter.
Dead-Time Consideration
In a practical full bridge, the upper and lower switches of the same leg must never conduct simultaneously. I inserted dead time between complementary gate signals. Dead time prevents shoot-through, but it also introduces voltage error and current distortion. If the output current lags the voltage, the dead time can reduce the fundamental output voltage and increase harmonic content. I used the advanced timer of the STM32 to insert dead time in hardware, avoiding external delay circuits. The dead time was set to approximately 3 μs, which is short enough to limit distortion but long enough to protect the MOSFETs.
Hardware Design
My hardware design includes the main power circuit, control circuit, driver circuit, power supply, sampling circuit, and protection circuit. The overall specification is listed below.
| Parameter | Value |
|---|---|
| Rated output power | 500 W |
| Nominal output voltage | 220 V ac |
| Output frequency | 50 Hz |
| Input dc voltage | 12 V nominal, 10.5–13.5 V range |
| Boost output voltage | 60 V before high-frequency transformer |
| High-frequency transformer ratio | Approximately 1:6 |
| Inverter dc link | 360 V |
| Switching frequency | 15 kHz |
| Controller | STM32F103C8T6 |
Boost Stage Design
The boost stage raises the low dc input to a higher dc voltage before the high-frequency transformer. Assuming ideal components, the input power equals the output power:
$$P_{in} = P_o$$
$$I_{in} = \frac{I_o}{1-D}$$
$$U_d = \frac{U_{in}}{1-D}$$
The inductor current ripple is:
$$\Delta I_L = \frac{U_{in}}{L} D T_s$$
For continuous conduction, the inductance should satisfy:
$$L \ge \frac{U_o^2 D (1-D)^2 T_s}{2 P_o \eta}$$
With a nominal 12 V input, a boost output of 60 V, a switching frequency of 15 kHz, a power level of 500 W, and a current ripple factor of 5%, I calculated an inductance of about 12.7 mH. I selected a boost switch rated at 600 V and 60 A, and a fast-recovery diode with low forward drop. The boost output capacitor was calculated from:
$$C \ge \frac{P_o D T_s}{\eta_c U_o^2}$$
Using a voltage ripple coefficient of 0.05, I obtained approximately 72.6 μF. I chose a 470 μF, 400 V electrolytic capacitor to provide margin and reduce dc-link ripple in the solar inverter.
High-Frequency Transformer Design
The high-frequency transformer provides voltage step-up and galvanic isolation. I used an EE42 magnetic core because it offers a good window area and effective core area. The core selection was guided by the area-product relationship:
$$A_c A_w \ge \left( \frac{P_T \times 10^4}{K_f K_w f_s B_w K_j} \right)^{\frac{1}{1+X}}$$
The primary turns were estimated from:
$$N_p = \frac{V_{in} \times 10^4}{K_f f_s B_w A_c}$$
In my design, the primary winding was set to 60 turns, and the secondary was set according to the required voltage ratio. I used a 1 mm enameled copper wire, corresponding to a current density of about 4 A/mm². The final transformer was a high-frequency EE42-type transformer suitable for 15–50 kHz operation and approximately 500 W. This component is important in compact solar inverters because it reduces weight compared with a line-frequency transformer.
Inverter Bridge and Filter
The full-bridge inverter uses four power MOSFETs. I selected IRFP450A devices with a drain-source voltage rating of 500 V and a drain current rating of 14 A. These ratings provide sufficient margin for the 360 V dc link and the 500 W power level. The output LC filter attenuates switching harmonics around 15 kHz. The cutoff frequency is:
$$f_c = \frac{1}{2\pi\sqrt{LC}}$$
I selected a filter inductor of 1 mH and a filter capacitor of 10 μF. The filter transfer function is:
$$G(s) = \frac{1}{1 + 2\zeta \frac{s}{\omega_n} + \left(\frac{s}{\omega_n}\right)^2}$$
$$\omega_n = \frac{1}{\sqrt{LC}}$$
This filter keeps the fundamental 50 Hz component nearly unchanged while attenuating high-frequency switching components. The resulting output is a smoother sine wave, which is essential for practical solar inverters feeding sensitive loads.
| Component | Selected Value or Model | Reason |
|---|---|---|
| Boost inductor | 12.7 mH calculated, suitable margin selected | Continuous conduction and low ripple |
| Boost switch | 600 V, 60 A class | Voltage and current margin |
| Boost diode | Fast-recovery type | Low reverse recovery loss |
| DC-link capacitor | 470 μF, 400 V | Ripple reduction and margin |
| Inverter MOSFETs | IRFP450A | 500 V, 14 A, suitable for 500 W |
| Filter inductor | 1 mH | Harmonic attenuation |
| Filter capacitor | 10 μF | Output smoothing |
| High-frequency transformer | EE42 core, 15–50 kHz | Isolation and voltage step-up |
Control Circuit
I used the STM32F103C8T6 as the main controller. It is based on the ARM Cortex-M3 core and can operate at up to 72 MHz. It includes two 12-bit ADCs, three general-purpose 16-bit timers, one advanced timer with complementary outputs and dead-time insertion, and multiple communication interfaces. The advanced timer is especially useful for generating four SPWM signals for the full bridge. I used PA8, PA9, PB13, and PB14 as the PWM outputs. PA8 and PA9 are complementary, while PB13 and PB14 are complementary. The dead time is inserted by the timer hardware.
The minimum system includes an 8 MHz crystal, a reset circuit, and SWD or JTAG debug access. The boot mode can be selected through BOOT0 and BOOT1 pins. For normal operation, the controller boots from user flash. For debugging, the internal SRAM boot mode can be used. This gives flexibility during development and testing of the solar inverter firmware.
Gate Driver Circuit
The STM32 pins cannot drive power MOSFET gates directly. I used the IR2110S gate driver to amplify and isolate the control signals. The IR2110S can drive both high-side and low-side switches in a bridge leg. It has fast propagation delay and includes undervoltage lockout. The pin functions are summarized below.
| Pin | Name | Function |
|---|---|---|
| 1 | LO | Low-side output |
| 2 | COM | Common ground |
| 3 | VCC | Low-side supply voltage |
| 6 | VS | High-side floating supply offset |
| 7 | VB | High-side floating supply |
| 8 | HO | High-side output |
| 11 | VDD | Logic supply voltage |
| 12 | HIN | High-side logic input |
| 13 | SD | Shutdown input |
| 14 | LIN | Low-side logic input |
| 15 | VSS | Logic ground |
I used bootstrap capacitors and bootstrap diodes for the high-side supply. The bootstrap capacitor was 47 μF/35 V, and the bootstrap diode was a fast-recovery type with low leakage. This arrangement ensures that the high-side gate receives enough charge during switching. Proper gate driver design is essential in solar inverters because poor gate drive increases switching loss and can destroy the power devices.
Power Supply
The control circuit requires 12 V, 5 V, and 3.3 V rails. The 12 V input is provided by the dc source. I used an L7805CV linear regulator to produce 5 V, and an LM1117 regulator to produce 3.3 V. Separate analog and digital 3.3 V rails were connected through a 0 Ω resistor to reduce interference between the analog sampling circuitry and the digital controller. This separation improves the accuracy of the ADC measurements used by the voltage and current loops.
Sampling Circuits
Accurate sampling is critical for stable operation. The STM32 ADC accepts 0–3.3 V, while the inverter voltages and currents are much higher. I used resistor dividers, operational amplifiers, and isolation devices to scale and condition the signals. For dc input voltage sampling, a resistor divider followed by a voltage follower and a clamping diode was used. For dc current sampling, a similar conditioning path was used. For ac output voltage and current sampling, I used Hall-effect voltage and current sensors. The sensors provide galvanic isolation, good accuracy, and reliable operation. The conditioned signals were connected to ADC channels on the STM32. I averaged multiple samples in software to reduce noise and improve measurement accuracy in the solar inverter.
Protection Circuits
I included overvoltage, undervoltage, overcurrent, and short-circuit protection. For overcurrent protection, a current transformer feeds a rectifier and filter, and the resulting signal is compared with a reference by an LM339 comparator. If the current exceeds the limit, the comparator output triggers an interrupt, and the STM32 immediately stops generating SPWM signals. For overvoltage and undervoltage protection, a window comparator detects when the input or output voltage leaves the acceptable range. If a fault occurs, the controller disables the PWM outputs and activates a buzzer or indicator. These protections improve the safety and reliability of the solar inverter.
Software Design
I developed the firmware in Keil uVision using C language and the STM32 standard peripheral library. The software is modular, with separate routines for initialization, ADC sampling, timer interrupts, PI control, SPWM generation, and protection. The main program initializes the system, configures the timers and ADCs, enables interrupts, and then enters a background loop. The timer interrupt handles the real-time tasks.
| Module | Main Function | Implementation Notes |
|---|---|---|
| Main program | Initialization and background loop | Configures clocks, GPIO, ADC, timers, and interrupts |
| ADC sampling | Reads voltage and current signals | Uses averaging to reduce noise |
| Interrupt routine | Executes control and protection tasks | Checks faults, updates duty cycle, generates SPWM |
| PI algorithm | Regulates voltage and current | Incremental PI form with output limiting |
| SPWM generation | Produces four gate signals | Lookup table and advanced timer |
SPWM Generation in Software
I used a lookup table to generate the sine reference. The table stores discrete values of a sine wave over one period. During each timer interrupt, the program reads the next value from the table and writes it to the compare register. The advanced timer operates in up-down counting mode, which naturally produces a triangular carrier. When the counter matches the compare register, the output pin toggles. By updating the compare value in a sinusoidal pattern, the output pulse width varies sinusoidally. This produces SPWM signals with high resolution and low CPU load. The same timer also inserts dead time, so no external dead-time circuit is required.
The control algorithm in the interrupt service routine follows a fixed sequence. First, the ADC results are read. Second, the output voltage error is calculated. Third, the outer PI controller generates a current reference. Fourth, the inner PI controller generates the modulation index. Fifth, the SPWM compare values are updated. Sixth, protection flags are checked. If any fault is present, the PWM outputs are disabled immediately. This structure ensures that the solar inverter responds quickly to load changes and fault conditions.
Experimental Validation
I built a small-power prototype to validate the design. The dc source was a 12 V sealed lead-acid battery. The inverter was tested with no load and with a combination of practical loads. The controller output was observed at the MOSFET gate after the driver stage, and the output voltage and current were measured at the ac terminals.
| Test Condition | Observed Result |
|---|---|
| No load | Output approximately 219 V, 50 Hz; stable waveform |
| Resistive load | Output voltage remained close to nominal; current increased with load |
| Practical mixed load | Approximately 470 W total; waveform remained stable |
| Sudden load application | Small transient; double-loop PI restored steady output quickly |
The SPWM waveforms at the gate driver output showed fast edges and acceptable overshoot. Small ringing was visible at switching transitions, but it did not prevent reliable operation. The output voltage waveform under no load was smooth and had low distortion. Under load, the waveform remained stable, and the voltage drop was small. When a linear load was suddenly applied, the output voltage dipped briefly and then recovered, demonstrating the dynamic benefit of the inner current loop.
I also measured efficiency using a variable resistive load bank. The results are shown below.
| Input Power (W) | Output Power (W) | Load Resistance (Ω) | Efficiency (%) |
|---|---|---|---|
| 50 | 45.42 | 1065.7 | 90.83 |
| 100 | 91.49 | 529.0 | 91.49 |
| 200 | 184.50 | 262.4 | 92.25 |
| 300 | 277.12 | 175.7 | 92.37 |
| 400 | 364.61 | 132.9 | 91.15 |
The measured efficiency remained above 90% across the tested range. This is satisfactory for a small off-grid solar inverter. The highest efficiency occurred near the middle of the load range, which is typical because switching and conduction losses vary with current. The result confirms that the selected components and control strategy are reasonably matched to the power level.
Discussion
The experimental results show that my solar inverter can produce a stable 220 V, 50 Hz output from a low-voltage dc source. The unipolar SPWM method reduces harmonic content, and the LC filter smooths the output. The high-frequency transformer provides isolation and reduces size compared with a line-frequency transformer. The double-loop PI controller improves both steady-state accuracy and transient response. The STM32F103C8T6 handles ADC sampling, PI calculation, SPWM generation, and fault protection in real time. This integration reduces component count and improves reliability.
However, I also identified limitations. When a large load is suddenly applied, the output voltage still exhibits a temporary dip. The recovery time depends on the PI gains and the available dc-link energy. A more advanced controller, such as a proportional-resonant controller or a model-predictive controller, could improve transient behavior. The power rating of the prototype is limited to about 500 W. For larger loads, the boost inductor, transformer, MOSFETs, and heat sink would need to be redesigned. Thermal management also becomes more important at higher power. The lack of galvanic isolation in some non-isolated topologies would require additional common-mode filtering and safety measures. In my high-frequency isolated design, isolation is provided, but the transformer design must avoid saturation and excessive leakage inductance.
Another consideration is maximum power point tracking. In this work, I concentrated on the inverter stage and the dc-dc boost stage. A complete photovoltaic system should include maximum power point tracking to extract the maximum available power from the array. The STM32 has enough computational resources to implement perturb-and-observe or incremental conductance algorithms. Future versions of my solar inverter could integrate MPPT directly into the boost stage. This would make the system more efficient under changing irradiance and temperature.
Conclusion
I designed, modeled, implemented, and tested a single-phase photovoltaic off-grid inverter based on an STM32F103C8T6. The design includes a boost stage, a high-frequency transformer, a full-bridge inverter, an LC filter, gate drivers, sampling circuits, and protection circuits. I modeled the photovoltaic cell in MATLAB/Simulink and studied its I-U and P-U characteristics. I analyzed inverter topologies and selected a high-frequency isolated structure. I implemented unipolar SPWM with dead-time insertion and a voltage-current double closed-loop PI controller. I developed the firmware in C and generated SPWM signals with the STM32 advanced timer. The prototype produced approximately 220 V, 50 Hz ac output with stable waveforms under no-load and loaded conditions. Efficiency remained above 90% in the tested range. These results demonstrate that the proposed design is feasible for small off-grid solar inverters and provides a useful foundation for further improvement.
Future Work
I plan to improve the system in several ways. First, I will integrate maximum power point tracking into the boost stage to increase energy harvest. Second, I will optimize the PI parameters using automatic tuning or adaptive control to reduce transient voltage dips. Third, I will increase the power rating and improve thermal design for larger loads. Fourth, I will add communication interfaces such as UART or CAN so the solar inverter can report status and receive commands from an energy management system. Fifth, I will investigate wide-bandgap devices such as SiC or GaN to reduce switching losses and increase power density. Finally, I will improve the printed circuit board layout to reduce electromagnetic interference and improve measurement accuracy. These steps would make the solar inverter more efficient, more reliable, and more suitable for practical off-grid photovoltaic applications.
In summary, the design confirms that a low-cost STM32 microcontroller can serve as the central controller for a compact single-phase photovoltaic off-grid inverter. By combining a high-frequency isolated power stage, unipolar SPWM, and double-loop PI control, I obtained a practical solar inverter with good waveform quality and acceptable efficiency. The work also highlights the importance of careful component selection, accurate sampling, proper dead time, and robust protection in solar inverters. I believe these findings can support further development of small-scale photovoltaic power systems for remote and portable applications.