In modern direct current (DC) microgrids, renewable energy sources such as wind and solar power are extensively integrated into distributed generation systems. The battery energy storage system plays a pivotal role as the energy storage unit within these distributed frameworks. The bidirectional DC-DC converter acts as the critical interface between the generation system and the battery energy storage system, enabling efficient bidirectional energy transfer to balance power demands caused by fluctuations in distributed generation and load variations. Optimizing the control of these converters is essential for enhancing the stability and responsiveness of the entire distributed generation system.
Among various topologies, the multi-phase interleaved parallel bidirectional DC-DC converter is widely utilized between the DC bus and the battery energy storage system due to its advantages, such as low switching current stress, reduced switching losses, and high power density. However, inconsistencies in parasitic parameters across the parallel phases can lead to unequal current stress among phases. Components subjected to higher current stress are more prone to damage, potentially causing the entire parallel system to malfunction. Therefore, developing a control strategy capable of handling large currents, minimizing output ripple, ensuring high reliability, providing rapid response, and achieving balanced current sharing among phases is critical for the battery energy storage system.
This paper proposes a current sharing control strategy based on Sliding Mode Control and Model Predictive Control (SMC-MPC) to address the inter-phase current imbalance issue in three-phase interleaved parallel bidirectional Buck-Boost converters caused by parasitic parameter mismatches. The voltage outer loop utilizes SMC to enhance system robustness and response speed, while the current inner loop employs MPC to achieve precise current regulation through duty cycle compensation. Both simulation and experimental results validate the effectiveness and feasibility of the proposed method.
Converter Topology and Characteristic Analysis
The topology of the three-phase interleaved parallel bidirectional Buck-Boost converter consists of three identical single-phase Buck-Boost circuits connected in parallel. The input voltage is denoted as \(U_{in}\), and the output voltage is \(U_o\). The three-phase storage inductors are \(L_1\), \(L_2\), and \(L_3\), with corresponding currents \(i_{L1}\), \(i_{L2}\), and \(i_{L3}\). Power switches \(S_1\) through \(S_6\) are controlled using phase-shifted interleaving, with their anti-parallel diodes \(VD_1\) through \(VD_6\) providing freewheeling paths. Input and output filter capacitors are \(C_1\) and \(C_2\), respectively.
When the converter operates in Boost mode (forward), energy flows from the input to the output. Switches \(S_1\), \(S_3\), and \(S_5\) are turned on with a phase shift of 120°, enabling automatic average current distribution under ideal conditions. In Buck mode (reverse), energy flows from the output to the input, with switches \(S_2\), \(S_4\), and \(S_6\) serving as the primary switches. The current and voltage ripple expressions for the converter under full duty cycle operation in both modes are summarized in the table below.
| Mode | Duty Cycle Range | Input Current Ripple \(\Delta i_{in}\) or \(\Delta i_o\) | Output Voltage Ripple \(\Delta U_{C2}\) or \(\Delta U_{C1}\) |
|---|---|---|---|
| Boost | \(0 < D_{Boost} < \frac{1}{3}\) | \(\frac{U_o (1-3D_{Boost}) D_{Boost} T_s}{L}\) | \(\frac{U_o (1-3D_{Boost}) D_{Boost} T_s}{R C_2 (1-D_{Boost})}\) |
| \(\frac{1}{3} \leq D_{Boost} \leq \frac{2}{3}\) | \(\frac{U_o T_s (3D_{Boost}-1)(2-3D_{Boost})}{3L}\) | \(\frac{U_o T_s (3D_{Boost}-1)(2-3D_{Boost})}{9R C_2 (1-D_{Boost})}\) | |
| \(\frac{2}{3} < D_{Boost} \leq 1\) | \(\frac{U_o T_s (1-3D_{Boost}+2)}{L}\) | \(\frac{U_o T_s (3D_{Boost}-2)}{3R C_2}\) | |
| Buck | \(0 < D_{Buck} < \frac{1}{3}\) | \(\frac{U_o D_{Buck} (1-3D_{Buck}) T_s}{L}\) | \(\frac{U_{in}^2 T_s (1-3D_{Buck})}{24 C_1 L}\) |
| \(\frac{1}{3} \leq D_{Buck} \leq \frac{2}{3}\) | \(\frac{U_o T_s (3D_{Buck}-1)(2-3D_{Buck})}{3L}\) | \(\frac{U_{in}^2 T_s (3D_{Buck}-1)(2-3D_{Buck})}{36 C_1 L D_{Buck}}\) | |
| \(\frac{2}{3} < D_{Buck} \leq 1\) | \(\frac{U_o T_s (1-3D_{Buck}+2)}{L}\) | \(\frac{U_{in}^2 T_s D_{Buck} (1-3D_{Buck}+2)}{24 C_1 L D_{Buck}}\) |
For analysis, the single-phase Buck-Boost converter model is considered. In Boost mode, the continuous state-space equations during the on-time and off-time of switch \(S_1\) are derived. Using the state-space averaging method and discretization theorem, the discrete state-space equations for the inductor current \(i_{L1}\) and output voltage \(U_o\) are obtained:
$$i_{L1}(k+1) = i_{L1}(k) + \frac{T_s}{L_1} U_{in}(k) + \frac{(1-D_{Boost1}(k)) T_s}{L_1} U_o(k)$$
$$U_o(k+1) = U_o(k) – \frac{T_s}{R C_2} U_o(k) + \frac{(1-D_{Boost1}(k)) T_s}{C_2} i_{L1}(k)$$
Similarly, for Buck mode:
$$i_{L1}(k+1) = i_{L1}(k) + \frac{D_{Buck1}(k) T_s}{L_1} U_{in}(k) – \frac{T_s}{L_1} U_o(k)$$
$$U_{in}(k+1) = U_{in}(k) – \frac{T_s}{R C_1} U_{in}(k) + \frac{T_s}{C_1} i_{L1}(k)$$
These discrete models form the foundation for the model predictive current control design.
Proposed SMC-MPC Current Sharing Strategy
To overcome the limitations of traditional PI control, such as slow response and complex parameter tuning, this paper proposes an SMC-MPC hybrid control strategy. The voltage outer loop employs SMC to generate reference currents for the inner loop, while the current inner loop uses MPC to determine the optimal duty cycle for each phase, ensuring balanced current sharing.
The sliding mode controller is designed with the following state variables: the deviation between the instantaneous and steady-state inductor currents (\(\Delta i_{L1}\), \(\Delta i_{L2}\), \(\Delta i_{L3}\)), the output voltage deviation (\(x_2 = U_{o,ref} – U_o\)), and the integral of the output voltage deviation (\(x_3 = \int (U_{o,ref} – U_o) dt\)). The sliding surface \(S\) is defined as:
$$S = \Delta_1 \sum_{m=1}^{3} (i_{Lm,ref} – i_{Lm}) + \Delta_2 (U_{o,ref} – U_o) + \Delta_3 \int (U_{o,ref} – U_o) dt$$
All sliding coefficients \(\Delta_1, \Delta_2, \Delta_3\) are positive constants satisfying \(p/2 < q < p\) for odd \(q\). The reaching law ensures that the system state moves toward the sliding surface \(S=0\). Setting \(S=0\) yields the reference inductor current expression:
$$i_{ref} = \sum_{m=1}^{3} i_{Lm} – \frac{\Delta_2}{\Delta_1}(U_{o,ref} – U_o) – \frac{\Delta_3}{\Delta_1} \int (U_{o,ref} – U_o) dt$$
This reference value serves as the input to the inner current loop MPC.
For the current inner loop, MPC utilizes a cost function designed to minimize future deviations in output voltage and inductor current. The cost function is defined as:
$$Q = (U_o(k+1) – U_{o,ref})^2 + (i_{L1}(k+1) – i_{L1,ref})^2$$
Substituting the discrete state-space equations into the cost function and taking the partial derivative with respect to the duty cycle \(D_{Boost1}(k)\) yields:
$$\frac{\partial Q}{\partial D_{Boost1}(k)} = 0$$
Solving this equation provides the optimal duty cycle expression for phase 1 in Boost mode:
$$D_{Boost1}(k) = 1 + \frac{C_2 L_1}{C_2 U_o(k) T_s} – \frac{C_2 L_1 U_o(k) i_{L1}(k)}{C_2 U_o(k) T_s} + \frac{C_2 L_1 i_{L1,ref}}{C_2 U_o(k) T_s} – \frac{C_2 L_1 U_{o,ref}(k)}{C_2 U_o(k) T_s} + \frac{C_2 T_s U_o(k) U_{in}(k)}{C_2 U_o(k) T_s}$$
Similarly, the optimal duty cycles for phases 2 and 3 in Boost mode are:
$$D_{Boost2}(k) = 1 + \frac{C_2 L_2}{C_2 U_o(k) T_s} – \frac{C_2 L_2 U_o(k) i_{L2}(k)}{C_2 U_o(k) T_s} + \frac{C_2 L_2 i_{L2,ref}}{C_2 U_o(k) T_s} – \frac{C_2 L_2 U_{o,ref}(k)}{C_2 U_o(k) T_s} + \frac{C_2 T_s U_o(k) U_{in}(k)}{C_2 U_o(k) T_s}$$
$$D_{Boost3}(k) = 1 + \frac{C_2 L_3}{C_2 U_o(k) T_s} – \frac{C_2 L_3 U_o(k) i_{L3}(k)}{C_2 U_o(k) T_s} + \frac{C_2 L_3 i_{L3,ref}}{C_2 U_o(k) T_s} – \frac{C_2 L_3 U_{o,ref}(k)}{C_2 U_o(k) T_s} + \frac{C_2 T_s U_o(k) U_{in}(k)}{C_2 U_o(k) T_s}$$
For Buck mode, the optimal duty cycle expressions for each phase are:
$$D_{Buck1}(k) = \frac{L_1 i_{L1,ref} – L_1 i_{L1}(k) + T_s U_{in}(k)}{U_o(k) T_s}$$
$$D_{Buck2}(k) = \frac{L_2 i_{L2,ref} – L_2 i_{L2}(k) + T_s U_{in}(k)}{U_o(k) T_s}$$
$$D_{Buck3}(k) = \frac{L_3 i_{L3,ref} – L_3 i_{L3}(k) + T_s U_{in}(k)}{U_o(k) T_s}$$
These duty cycles, computed based on the SMC-derived reference currents, are applied to the switches to achieve precise current sharing. The maximum current sharing module adjusts the reference currents based on phase current deviations, ensuring rapid balance restoration under transient conditions.
Simulation Results and Analysis
To validate the effectiveness of the proposed SMC-MPC strategy, a simulation platform was built using Matlab/Simulink. The simulation parameters are listed below.
| Parameter | Value |
|---|---|
| Input Voltage \(U_{in}\) | 10–40 V |
| Output Voltage \(U_o\) | 50 V |
| Inductance \(L_1, L_2, L_3\) | 0.82 mH, 0.80 mH, 0.78 mH |
| Parasitic Resistance \(R_1, R_2, R_3\) | 0.08 Ω, 0.10 Ω, 0.12 Ω |
| Filter Capacitor \(C\) | 470 μF |
| Switching Frequency \(f_s\) | 20 kHz |
Two control strategies were compared: the conventional PI-MPC and the proposed SMC-MPC. In Boost mode with a duty cycle of 0.5, the SMC-MPC strategy significantly reduced overshoot and improved current sharing accuracy. The simulation results are summarized below.
| Control Strategy | Overshoot (%) | Settling Time (ms) | Current Imbalance Error (%) |
|---|---|---|---|
| PI-MPC | 30.3 | 15 | 2.37 |
| SMC-MPC | 0 | 5 | 1.98 |
In Buck mode with a duty cycle of 0.5, the SMC-MPC strategy demonstrated similar improvements.
| Control Strategy | Overshoot (%) | Settling Time (ms) | Current Imbalance Error (%) |
|---|---|---|---|
| PI-MPC | 32.8 | 13 | 3.56 |
| SMC-MPC | 0 | 5 | 2.69 |
Load disturbance tests were also performed. For Boost mode, the load was stepped from 20 Ω to 10 Ω and back to 20 Ω. For Buck mode, the load was stepped from 2.4 Ω to 1.2 Ω and back. The SMC-MPC strategy enabled the output voltage and currents to recover to steady state within 5 ms, with minimal overshoot and strong robustness.
Experimental Results
A 500 W experimental prototype was built to further verify the proposed control method. The main circuit used Infineon IRF3205PBF MOSFETs, and the controller was based on a TI TMS320F28335 DSP. Three-phase inductor currents were measured using Hall effect sensors. The prototype parameters are listed below.
| Parameter | Value |
|---|---|
| Input Voltage \(U_{in}\) | 10–48 V |
| Output Voltage \(U_o\) | 48 V |
| Switching Frequency \(f_s\) | 20 kHz |
| Inductance \(L_1, L_2, L_3\) | 0.90 mH |
| Input/Output Capacitors \(C_1, C_2\) | 470 μF |
Experimental tests were conducted in both Boost and Buck modes under various duty cycles. The results for Boost mode with a duty cycle of 0.3 and a 10 Ω load showed that the SMC-MPC strategy reduced the maximum current imbalance error from 4% (with PI-MPC) to 2%. In Buck mode with a duty cycle of 0.7 and a 2 Ω load, the error was reduced from 4% to 1%. The experimental data are summarized below.
| Control Strategy | Phase A (A) | Phase B (A) | Phase C (A) | Imbalance Error (%) |
|---|---|---|---|---|
| PI-MPC | 2.45 | 2.09 | 2.41 | 4 |
| SMC-MPC | 2.32 | 2.35 | 2.29 | 2 |
| Control Strategy | Phase A (A) | Phase B (A) | Phase C (A) | Imbalance Error (%) |
|---|---|---|---|---|
| PI-MPC | 5.12 | 4.96 | 4.98 | 4 |
| SMC-MPC | 4.95 | 4.92 | 4.86 | 1 |
Dynamic load step tests further demonstrated the superiority of the proposed method. In Buck mode, the load was stepped from 2.4 Ω to 1.2 Ω and back. The SMC-MPC strategy achieved zero overshoot, a settling time of 0.4 ms, and a current imbalance error of 2%, compared to 11.5% overshoot, 50 ms settling time, and 4% error for the PI-MPC strategy.
| Control Strategy | Overshoot (%) | Minimum Settling Time (ms) | Current Imbalance Error (%) |
|---|---|---|---|
| SMC-MPC | 0 | 0.4 | 2 |
| PI-MPC | 11.5 | 50 | 4 |
Conclusion
This paper proposes a sliding mode control and model predictive control (SMC-MPC) current sharing strategy for a three-phase interleaved parallel bidirectional Buck-Boost converter used in a battery energy storage system. The SMC outer loop provides robust and fast voltage regulation, generating reference currents for the MPC inner loop. The MPC inner loop optimizes duty cycles to achieve precise current sharing among phases, effectively compensating for parasitic parameter mismatches.
Compared with the traditional PI-MPC strategy, the SMC-MPC approach offers several advantages: (1) Control parameters depend only on converter characteristics, simplifying tuning. (2) Current sharing accuracy is significantly improved across all duty cycles and operating modes (Boost and Buck). (3) Dynamic response is faster with substantially reduced overshoot and settling time under load disturbances, demonstrating enhanced robustness. Both simulation and experimental results confirm the effectiveness and feasibility of the proposed SMC-MPC strategy for balancing currents and improving the overall performance of the battery energy storage system.