In modern photovoltaic (PV) systems, solar inverters play a critical role in converting DC power from solar panels to AC power for grid integration. However, single-phase grid-connected solar inverters often face challenges due to double-line frequency ripple voltage on the DC bus, which distorts the reference current and leads to excessive third-harmonic current injection into the grid. This issue severely impacts power quality and compliance with standards such as IEEE-1547. To address this, I propose a harmonic suppression control strategy based on cascaded notch filters for two-stage half-bridge micro solar inverters. This approach introduces cascaded notch filters to attenuate harmonic components in the voltage control loop, generating smooth reference power and improving the quality of current injected into the grid. In this article, I analyze the influence of power decoupling capacitors on DC bus ripple voltage, model the harmonic currents in two-stage half-bridge solar inverters, and integrate cascaded notch filters into the traditional voltage loop PI controller to mitigate second and third-harmonic currents. Experimental results validate the proposed strategy, demonstrating compliance with IEEE-1547 standards and robust steady-state and dynamic performance, even with DC capacitor value mismatches of up to ±20%.
The proliferation of distributed generation systems has increased the demand for efficient solar inverters, particularly micro solar inverters that serve individual PV panels to avoid shading issues common in multi-panel configurations. These solar inverters are commonly used in residential rooftop PV systems due to their scalability and reliability. However, the inherent nature of single-phase grid connection results in instantaneous power consisting of an average value and a double-frequency sinusoidal pulsation. This pulsation causes a second-harmonic ripple voltage on the DC link, which distorts the grid reference current and introduces significant third-harmonic currents. Moreover, discrepancies in the values of DC link capacitors, often caused by aging or temperature variations, can lead to additional second-harmonic currents, exacerbating power quality issues. Traditional methods to mitigate these harmonics, such as increasing DC link capacitance, often compromise system dynamics and are insufficient under practical tolerances. Thus, advanced control strategies are essential for solar inverters to maintain high power quality and adherence to grid standards.
To understand the root cause of harmonic issues in solar inverters, I first examine the impact of power decoupling capacitors on the DC bus ripple voltage. In a typical two-stage half-bridge solar inverter topology, the DC link capacitors, denoted as \(C_1\) and \(C_2\), are crucial for filtering ripple. Assuming the average voltages across these capacitors are equal and half of the DC voltage, applying Kirchhoff’s current law at the DC link yields the voltages \(u_{C1}\) and \(u_{C2}\) as:
$$ u_{C1}(t) = \frac{1}{C_1} \int \left( i_{dc}(t) – \frac{i_g(t)}{2} \right) dt + U_{a} $$
$$ u_{C2}(t) = \frac{1}{C_2} \int \left( i_{dc}(t) + \frac{i_g(t)}{2} \right) dt + U_{b} $$
where \(i_{dc}\) is the DC input current, \(i_g\) is the grid current, and \(U_a\) and \(U_b\) are the DC components of the capacitor voltages. The total DC link voltage \(u_{dc}(t)\) is the sum of \(u_{C1}(t)\) and \(u_{C2}(t)\):
$$ u_{dc}(t) = u_{C1}(t) + u_{C2}(t) = \frac{1}{C_1 + C_2} \int \left( 2i_{dc}(t) – i_g(t) \right) dt + U_{dc} $$
Under steady-state conditions, the average grid power equals the average DC input power, and the DC link voltage is regulated to a reference value. Assuming a constant DC input current and a sinusoidal grid current, the DC link voltage can be expressed as:
$$ u_{dc}(t) = \frac{1}{2(C_1 + C_2)} \int \left( \frac{P}{U_{dc}} \cos(2\omega_g t + \phi) – I_g \sin(\omega_g t + \phi_i) \right) dt + U_{dc} $$
where \(\omega_g\) is the grid angular frequency, \(\phi\) is the phase lag, \(P\) is the power, and \(I_g\) is the grid current amplitude. The ripple voltage component consists of fundamental and second-harmonic terms:
$$ u_{ripple}(t) = A \sin(2\omega_g t + \phi) + B \cos(\omega_g t + \phi_i) $$
where \(A\) and \(B\) are coefficients dependent on capacitor values and power levels. For instance, in a 300 W solar inverter with \(C_1 = C_2 = 1280 \, \mu F\) and a DC voltage of 400 V, the peak ripple voltage is approximately 1.86 V. The relationship between ripple voltage and system parameters is summarized in Table 1, illustrating how ripple magnitude varies with apparent power and DC voltage.
| Parameter | Value Range | Ripple Voltage Peak (V) |
|---|---|---|
| Apparent Power (VA) | 0-300 | 0-1.86 |
| DC Voltage (V) | 300-500 | 2.5-1.5 |
| Total Capacitance (\(\mu F\)) | 2000-3000 | 2.0-1.2 |
Increasing the total DC link capacitance reduces ripple but slows system dynamics, making it an inefficient solution for solar inverters. Furthermore, practical capacitor mismatches, defined by a tolerance coefficient \(m\) where \(C_1 = (1-m)C_{nom}\) and \(C_2 = (1+m)C_{nom}\) with \(C_{nom}\) as the nominal capacitance, can exacerbate harmonics. For example, with \(m = \pm 20\%\), the capacitance difference reaches 40%, leading to significant second and third-harmonic currents that violate grid standards.
Next, I model the harmonic currents in two-stage half-bridge solar inverters to quantify these effects. The conventional voltage control loop, as shown in Figure 1, regulates the DC link voltage using a PI controller. The error signal \(u_e\) in the voltage loop is given by:
$$ u_e(t) = U_{dc,ref} – u_{dc}(t) = -A \sin(2\omega_g t) + B \cos(\omega_g t) $$
This error consists of fundamental and second-harmonic components. In steady state, the reference power \(P_{ref}\) generated by the PI controller includes average and oscillatory terms:
$$ P_{ref}(t) = P_{avg} + P_{1\omega}(t) + P_{2\omega}(t) $$
where \(P_{1\omega}\) and \(P_{2\omega}\) are the fundamental and second-harmonic power components, respectively. The RMS value of the reference grid current is derived by dividing the reference power by the grid voltage RMS, leading to:
$$ I_{g,ref}(t) = \frac{P_{avg}}{U_g} + \frac{P_{1\omega}}{U_g} \cos(\omega_g t + \theta_1) + \frac{P_{2\omega}}{U_g} \cos(2\omega_g t + \theta_2) $$
The actual grid current, assuming perfect tracking, mirrors this reference but introduces distortions due to harmonics. The third-harmonic current amplitude \(I_{3h}\) can be expressed as:
$$ I_{3h} = \frac{\sqrt{2} U_g \omega_g C_1 C_2}{2(C_1 + C_2) U_{dc}} $$
Similarly, the second-harmonic current depends on the capacitor mismatch. For instance, with \(m = 0.2\), the second-harmonic current can exceed 9%, while the third-harmonic reaches 10%, as detailed in Table 2.
| Mismatch Coefficient \(m\) | Second-Harmonic Current (%) | Third-Harmonic Current (%) |
|---|---|---|
| 0 (Equal Capacitors) | 0.0 | 9.16 |
| 0.1 | 4.5 | 9.5 |
| 0.2 | 9.43 | 10.35 |
To address these harmonic issues in solar inverters, I propose a control strategy incorporating cascaded notch filters. The notch filter is composed of a second-order low-pass filter multiplied by a second-order high-pass filter, with the transfer function:
$$ G_{notch}(s) = \frac{s^2 + 2\zeta \omega_n s + \omega_n^2}{s^2 + 2\zeta \omega_n s + \omega_n^2} $$
where \(\zeta\) is the damping ratio, and \(\omega_n\) is the natural frequency. For harmonic suppression, I design two cascaded notch filters: one tuned to the fundamental frequency \(\omega_g\) and another to the second harmonic \(2\omega_g\). Their transfer functions are:
$$ G_{n\omega}(s) = \frac{s^2 + 2\zeta_1 \omega_g s + \omega_g^2}{s^2 + 2\zeta_1 \omega_g s + \omega_g^2} $$
$$ G_{n2\omega}(s) = \frac{s^2 + 2\zeta_2 (2\omega_g) s + (2\omega_g)^2}{s^2 + 2\zeta_2 (2\omega_g) s + (2\omega_g)^2} $$
These filters are integrated into the voltage control loop, as illustrated in Figure 2, to attenuate the fundamental and second-harmonic components in the error signal. The overall open-loop transfer function of the voltage control system with cascaded notch filters is:
$$ G_{ol}(s) = G_{PI}(s) \cdot G_{n\omega}(s) \cdot G_{n2\omega}(s) \cdot G_{PWM}(s) $$
where \(G_{PI}(s) = K_p + \frac{K_i}{s}\) is the PI controller, and \(G_{PWM}(s)\) represents the PWM generator. The parameters \(\zeta_1\) and \(\zeta_2\) are set to 0.05 to ensure harmonic currents remain below 1% for second harmonic and 4% for third harmonic, complying with IEEE-1547. The frequency response of the proposed system, shown in Figure 3, demonstrates improved phase margin and effective attenuation at targeted frequencies.
To validate the proposed strategy for solar inverters, I built a 300 W experimental prototype with the following parameters: output voltage 220 V, grid frequency 50 Hz (\(\omega_g = 100\pi \, \text{rad/s}\)), DC voltage 400 V, switching frequency 10 kHz, filter inductance 15 mH, voltage loop bandwidth 20 Hz, PI controller gains \(K_p = 30\) and \(K_i = 1300\), and notch filter parameters \(\zeta_1 = \zeta_2 = 0.05\), \(\omega_n = 100\pi \, \text{rad/s}\) for the fundamental notch and \(2\omega_n = 200\pi \, \text{rad/s}\) for the second-harmonic notch. The control system was implemented on an ARM Cortex-M4 processor with floating-point unit. Two scenarios were tested: equal capacitors (\(C_1 = C_2 = 1280 \, \mu F\)) and mismatched capacitors (\(C_1 = 1024 \, \mu F\), \(C_2 = 1530 \, \mu F\), representing a 40% difference).
In steady-state tests with equal capacitors, the DC link voltage was well-regulated to 400 V, and capacitor voltages stabilized at 200 V, with only second-harmonic ripple. Without notch filters, the grid current contained 9.16% third-harmonic distortion. Adding the second-harmonic notch filter reduced this to 0.36%, producing a smooth current waveform. For mismatched capacitors, the DC link voltage exhibited both fundamental and second-harmonic components. Without mitigation, the grid current had 9.43% second-harmonic and 10.35% third-harmonic currents. With only the second-harmonic notch filter, the third-harmonic decreased to 0.73%, but the second-harmonic remained at 9.9%. Incorporating both cascaded notch filters reduced the second-harmonic to 0.33% and the third-harmonic to 0.48%, meeting IEEE-1547 requirements. Table 3 summarizes these results.
| Condition | Notch Filters | Second-Harmonic (%) | Third-Harmonic (%) |
|---|---|---|---|
| Equal Capacitors | None | 0.0 | 9.16 |
| Equal Capacitors | Second-Harmonic Only | 0.0 | 0.36 |
| Mismatched Capacitors | None | 9.43 | 10.35 |
| Mismatched Capacitors | Second-Harmonic Only | 9.9 | 0.73 |
| Mismatched Capacitors | Cascaded | 0.33 | 0.48 |
Transient performance was evaluated by applying a step change in input DC power from 0 to 200 W. With equal capacitors, the traditional PI controller took approximately three cycles to restore the DC voltage to its reference, while the addition of cascaded notch filters had negligible impact on response time. Similarly, for mismatched capacitors, the proposed strategy maintained fast dynamics without compromising stability. The voltage and current waveforms during transients confirmed the robustness of the approach, with minimal overshoot and settling time within acceptable limits for solar inverters.
In conclusion, the double-line frequency ripple voltage on the DC bus in solar inverters causes reference current distortion and excessive third-harmonic injection, degrading grid power quality. The proposed control strategy using cascaded notch filters effectively suppresses these harmonics by attenuating disruptive components in the voltage control loop. Through analytical modeling and experimental validation, I demonstrated that this approach ensures compliance with IEEE-1547 standards, even under practical capacitor mismatches of ±20%. The strategy offers excellent steady-state and dynamic performance, making it a reliable solution for enhancing the power quality of solar inverters in residential and commercial PV systems. Future work could explore adaptive notch filter tuning for varying operating conditions in solar inverters to further optimize harmonic suppression.