The global push towards integrating renewable energy sources into the power grid has created an urgent need for reliable, large-scale, and efficient energy storage solutions. Among the various technologies, Compressed Air Energy Storage (CAES) stands out due to its long lifespan, large capacity, and environmental friendliness. A critical component in the expansion/generation phase of a CAES system is the grid-tied inverter, which serves as the vital interface between the variable DC power from the generator and the stable AC power grid. The primary control objectives for this grid-tied inverter are to maintain a stable DC-link voltage and to ensure the fast, accurate, and high-quality injection of real power into the grid. This directly impacts the overall stability and efficiency of the energy storage system. Traditionally, the ubiquitous PI controller within a cascaded voltage-current control loop has been employed. However, its performance is often compromised by significant overshoot, slow dynamic response, and sensitivity to internal parameter variations and external grid disturbances. This article explores the application of a Linear Active Disturbance Rejection Control (LADRC) strategy for the voltage outer loop of a CAES system’s grid-tied inverter, presenting a robust alternative that significantly enhances performance.
The typical structure of a CAES expansion generation system involves an expander directly coupled to a Permanent Magnet Synchronous Generator (PMSG). The variable AC output is first rectified to DC, and then a grid-tied inverter converts this DC power back to grid-synchronized AC power. The focus of our control is this final grid-tied inverter. Its standard topology in a three-phase system is shown below, consisting of a DC-link capacitor, a three-phase inverter bridge, and an L-type filter connected to the grid.
To design an effective controller, we must first establish a mathematical model of the grid-tied inverter. In the three-phase stationary (abc) frame, the dynamics are described by:
$$
\begin{aligned}
L\frac{di_{ga}}{dt} &= e_{ga} – R i_{ga} – u_{ga} \\
L\frac{di_{gb}}{dt} &= e_{gb} – R i_{gb} – u_{gb} \\
L\frac{di_{gc}}{dt} &= e_{gc} – R i_{gc} – u_{gc} \\
C\frac{dU_{dc}}{dt} &= \sum_{k=a,b,c} S_k i_{gk} – i_{load}
\end{aligned}
$$
where \(i_{gabc}\) are the grid currents, \(e_{gabc}\) are the grid voltages, \(u_{gabc}\) are the inverter output voltages, \(R\) and \(L\) are the filter resistance and inductance, \(U_{dc}\) is the DC-link voltage, \(C\) is the DC-link capacitance, \(i_{load}\) is the load current, and \(S_k\) represents the switching function. For control design, it is standard to transform these equations into the synchronous rotating (dq) frame, which aligns with the grid voltage vector. This transformation converts AC quantities into DC values in steady state, simplifying controller design. Using a Phase-Locked Loop (PLL) to obtain the grid angle \(\theta\), the dq-model is derived:
$$
\begin{aligned}
L\frac{di_{gd}}{dt} &= e_{gd} – u_{gd} – R i_{gd} + \omega L i_{gq} \\
L\frac{di_{gq}}{dt} &= e_{gq} – u_{gq} – R i_{gq} – \omega L i_{gd} \\
C\frac{dU_{dc}}{dt} &= \frac{3}{2}(S_d i_{gd} + S_q i_{gq}) – i_{load}
\end{aligned}
$$
Here, \(\omega\) is the grid angular frequency. By aligning the d-axis with the grid voltage vector, we have \(e_{gd} = |E|\) (the grid voltage magnitude) and \(e_{gq} = 0\). The conventional control strategy for a grid-tied inverter is Voltage Oriented Vector Control (VOC). This employs a cascaded loop structure: a slower outer voltage loop regulates the DC-link voltage \(U_{dc}\) to its reference value, and its output becomes the reference for the d-axis current \(i_{gd}^*\), which controls active power flow. The q-axis current reference \(i_{gq}^*\) is typically set to zero for unity power factor operation. Fast inner current loops then track these dq current references. The standard PI-based current control law with decoupling terms is:
$$
\begin{aligned}
u_{gd} &= -\left(K_{iP} + \frac{K_{iI}}{s}\right)(i_{gd}^* – i_{gd}) + \omega L i_{gq} + e_{gd} \\
u_{gq} &= -\left(K_{iP} + \frac{K_{iI}}{s}\right)(i_{gq}^* – i_{gq}) – \omega L i_{gd}
\end{aligned}
$$
While this method is simple and widely used, its performance is limited. The PI controller in the voltage outer loop struggles with the nonlinear, time-varying, and disturbance-prone nature of the DC-link voltage dynamics. Disturbances such as sudden changes in generator power, grid voltage sags/swells, or load steps can cause significant voltage fluctuation, slow recovery, and large overshoot.
To overcome these limitations, we propose replacing the PI controller in the voltage outer loop with a second-order Linear Active Disturbance Rejection Controller (LADRC). The core philosophy of LADRC is to treat all unknown dynamics, model uncertainties, and external disturbances as a “total disturbance,” estimate it in real-time using a Linear Extended State Observer (LESO), and actively cancel it out. This grants the controller inherent robustness. The general structure of a second-order LADRC for a plant like our DC-link voltage is illustrated in the following block diagram.
Consider a generalized second-order plant:
$$ \ddot{y} = f(y, \dot{y}, w, t) + b u $$
where \(y\) is the output (here, \(U_{dc}\)), \(u\) is the control input, \(b\) is a known control gain, and \(f\) encapsulates all internal and external disturbances. The LADRC design consists of two main parts:
- Linear Extended State Observer (LESO): It extends the system state by treating the total disturbance \(f\) as an additional state \(x_3\). A third-order observer is designed to estimate both the system states (\(z_1 \approx y\), \(z_2 \approx \dot{y}\)) and the disturbance (\(z_3 \approx f\)).
- Linear State Error Feedback (LSEF) & Disturbance Rejection: The control law is formulated as \(u = (u_0 – z_3)/b_0\), where \(b_0\) is the chosen controller gain approximating \(b\). This actively cancels the estimated disturbance. The remaining control \(u_0\) is a simple proportional-derivative (PD) law on the state error: \(u_0 = k_p (r – z_1) – k_d z_2\).
To apply LADRC to our grid-tied inverter voltage loop, we define the system. From the dq-model, we can derive a second-order relation for \(U_{dc}\). For control design, we can express it in a simplified form suitable for observer design:
$$ \ddot{U}_{dc} = f + b_0 i_{gd}^* $$
where \(i_{gd}^*\) is now our control input \(u\) (the reference for the inner current loop), \(f\) is the total disturbance encompassing cross-coupling terms, grid voltage variations, generator power changes, and load disturbances, and \(b_0\) is a tunable gain. We then construct the third-order LESO as follows:
$$
\begin{aligned}
\dot{z}_1 &= z_2 – \beta_1 (z_1 – U_{dc}) \\
\dot{z}_2 &= z_3 – \beta_2 (z_1 – U_{dc}) + b_0 i_{gd}^* \\
\dot{z}_3 &= -\beta_3 (z_1 – U_{dc})
\end{aligned}
$$
The observer gains \(\beta_1, \beta_2, \beta_3\) are parameterized by a single observer bandwidth \(\omega_o\) for easy tuning:
$$ \beta_1 = 3\omega_o, \quad \beta_2 = 3\omega_o^2, \quad \beta_3 = \omega_o^3 $$
The control law for the LADRC-based voltage loop is:
$$ i_{gd}^* = \frac{k_p (U_{dc}^* – z_1) – k_d z_2 – z_3}{b_0} $$
The controller gains \(k_p\) and \(k_d\) are parameterized by the controller bandwidth \(\omega_c\):
$$ k_p = \omega_c^2, \quad k_d = 2\omega_c $$
This elegant parameterization reduces the tuning process to adjusting just two intuitive parameters: \(\omega_o\) and \(\omega_c\). The complete control structure for the LADRC-based grid-tied inverter is summarized below, showing the integration of the LADRC voltage outer loop with the standard PI-based current inner loops and decoupling.
To validate the superiority of the proposed LADRC strategy over the traditional PI control, a detailed simulation model of a 110 kW CAES expansion generation system was built. Key system parameters are listed in the table below.
| Parameter | Symbol | Value |
|---|---|---|
| Rated Power | Prated | 110 kW |
| Grid Line Voltage | Ug | 380 V |
| Grid Frequency | f | 50 Hz |
| DC-link Voltage Reference | Udc* | 1000 V |
| DC-link Capacitance | C | 7000 μF |
| Grid-side Filter Inductance | L | 6 mH |
| Grid-side Filter Resistance | R | 0.01 mΩ |
| LADRC Controller Bandwidth | ωc | 20,000 rad/s |
| LADRC Observer Bandwidth | ωo | 40,000 rad/s |
| LADRC Control Gain | b0 | 3.8 × 109 |
Scenario 1: Constant Power Demand. The system starts up with a constant grid power demand of 110 kW. The dynamic response of the DC-link voltage is critically examined. Under PI control, the voltage exhibits an overshoot of approximately 5.8% and takes about 0.12 seconds to settle into a steady state at 1000 V. In contrast, the grid-tied inverter controlled by the LADRC strategy shows a dramatically improved response: the overshoot is reduced to a mere 1%, and the settling time is shortened to about 0.05 seconds. This demonstrates the faster and smoother voltage regulation capability of LADRC. The corresponding output active power tracking shows similar benefits, with LADRC achieving steadier and quicker convergence to the reference power. Furthermore, the quality of the grid current is significantly enhanced. A harmonic analysis (FFT) of the phase-A grid current reveals that LADRC reduces the Total Harmonic Distortion (THD) from 3.12% (with PI) to 1.05%, leading to a much cleaner sinusoidal current waveform and superior power quality at the point of common coupling.
Scenario 2: Variable Power Demand. This test evaluates the controller’s robustness against power transients. The grid power demand steps down from 110 kW to 85 kW at t=0.4s, and then steps up to 98 kW at t=0.7s. The performance comparison is summarized in the following table.
| Performance Metric | PI Control | LADRC Control |
|---|---|---|
| DC Voltage Overshoot (Start-up) | ~5.8% | ~1% |
| DC Voltage Settling Time (Start-up) | ~0.12 s | ~0.05 s |
| Recovery Time after 0.4s Step | ~0.10 s | ~0.08 s |
| Recovery Time after 0.7s Step | ~0.10 s | ~0.08 s |
| Grid Current THD | 3.12% | 1.05% |
| Power Tracking Speed & Accuracy | Slower, larger overshoot | Faster, minimal overshoot |
The waveforms clearly show that during each power transient, the DC-link voltage under PI control experiences a larger deviation and requires a longer recovery period (~0.1s) compared to the LADRC-controlled system (~0.08s). The active power output under LADRC also tracks the demand changes more swiftly and accurately, with less oscillation. The grid current waveforms confirm that the LADRC-based grid-tied inverter maintains better stability and a faster return to steady-state during these disturbances.
In conclusion, the application of a second-order Linear Active Disturbance Rejection Controller for the voltage regulation of a Compressed Air Energy Storage system’s grid-tied inverter presents a substantial advancement over conventional PI control. The proposed strategy directly addresses the core limitations of PI control by actively estimating and compensating for total disturbances, which include model uncertainties, coupling effects, and external power or grid variations. The simulation results under both constant and variable power demand scenarios conclusively demonstrate the superiority of LADRC. It provides significantly faster dynamic response with minimal overshoot, excellent disturbance rejection, and superior power quality (lower current THD). This leads to a more stable DC bus, more precise power tracking, and ultimately, a more robust and efficient interface between the CAES system and the power grid. The simplified two-parameter tuning process of LADRC further enhances its practical appeal for engineering implementation in modern energy storage systems.