In recent years, the global demand for clean and renewable energy has accelerated the deployment of solar photovoltaic systems. Among the key components of these systems, solar inverters play a critical role in converting DC power from photovoltaic panels into grid-compatible AC power. With the increasing penetration of SiC-based power devices, solar inverters can achieve higher switching frequencies, higher power density, and better thermal performance. However, these benefits come at the cost of more complex interactions among design objectives such as efficiency, lifetime, power density, cost, and electromagnetic interference (EMI).
Traditional design approaches for solar inverters often rely on iterative trial-and-error procedures or single-objective optimization, which are inadequate for capturing the trade-offs among multiple conflicting criteria. To address this challenge, I propose a comprehensive multi-objective optimization framework for solar inverters based on a novel hybrid algorithm, DQ-NSGAIII, which integrates quasi-opposition-based learning, an improved differential evolution operator, and a strengthened dominance relation. The proposed framework is applied to a 140 kW three-phase active neutral-point-clamped (ANPC) inverter, and the resulting design is experimentally validated.
System Description and Topology Selection
Several three-level inverter topologies have been widely used in medium- and high-power applications. Table 1 compares the key characteristics of four typical topologies: neutral-point-clamped (NPC), flying capacitor (FC), active neutral-point-clamped (ANPC), and T-type.
| Topology | Switches per phase | Diodes per phase | Flying capacitor | Loss distribution | Voltage stress |
|---|---|---|---|---|---|
| NPC | 4 | 6 | No | Uneven | Vdc/2 |
| Flying capacitor | 4 | 4 | Yes | Even | Vdc/2 |
| ANPC | 6 | 6 | No | Even | Vdc/2 |
| T-type | 4 | 4 | No | Uneven | Vdc |
Considering the requirements of high efficiency, balanced loss distribution, and suitable voltage stress, I selected the ANPC topology for the solar inverter. The ANPC inverter employs six switches per phase, which enables flexible commutation paths and better thermal sharing. In this work, a hybrid configuration using SiC MOSFETs for the high-frequency switches (Sa2 and Sa3) and Si IGBTs for the line-frequency switches (Sa1, Sa4, Sa5, Sa6) is adopted. The rated specifications of the investigated system are given in Table 2.
| Parameter | Value | Unit |
|---|---|---|
| Rated power | 140 | kW |
| DC bus voltage | 1200 | V |
| Phase output voltage (RMS) | 380 | V |
| Phase output current (RMS) | 120 | A |
| Modulation index | 0.9 | – |
| Power factor | 1 | – |
| Ambient temperature | 30 | °C |
Three-Level Modeling of the Solar Inverter
To perform multi-objective optimization, I established a hierarchical model consisting of three levels: component-level, device-level, and product-level. Each level interacts with the others through key parameters such as switching frequency, junction temperature, and component dimensions.
Component-Level Models
The component-level models include loss models for SiC MOSFETs and Si IGBTs, thermal models for junction temperature estimation, lifetime models based on power cycling, and loss/volume models for filter inductors.
The IGBT conduction loss for switch Sa1 is given by:
$$P_{IGBT,Sa1} = \frac{1}{2\pi} \int_{0}^{\pi} v_{ce}(i_c(t)) \, i_c(t) \, D(t) \, d\omega t$$
where \(v_{ce}\) is the saturation voltage, \(i_c\) is the collector current, and \(D(t)\) is the duty cycle. The total IGBT conduction loss for one phase is:
$$P_{IGBT} = 2 \left( P_{IGBT,Sa1} + P_{IGBT,Sa6} \right)$$
For the high-frequency SiC MOSFET Sa2, the conduction loss is:
$$P_{MOSFET,Sa2} = \frac{1}{2\pi} \int_{0}^{\pi} i_d^2(t) \, R_{ds(on)}(i_d) \, D(t) \, d\omega t$$
The switching loss of Sa2 and Sa3 is calculated from the turn-on and turn-off energies:
$$P_{MOSFET,SW} = f_{sw} \left( E_{on} + E_{off} \right)$$
The total loss of all 18 semiconductor devices in the three-phase ANPC inverter is:
$$P_{total} = 3 \left( P_{IGBT} + P_{MOSFET} \right)$$
For junction temperature calculation, I used a Foster thermal network model. The junction temperature of the SiC MOSFET is:
$$T_j = T_a + P_{total,mod} \cdot Z_{th(j-c)} + P_{total,mod} \cdot Z_{th(c-s)} + P_{total,mod} \cdot Z_{th(s-a)}$$
where \(Z_{th}\) are the thermal impedances. The lifetime estimation is based on the Coffin-Manson model combined with the Rainflow counting method:
$$N_f = A \cdot \left( \Delta T_j \right)^{\alpha} \cdot \exp\left( \frac{E_a}{k_B \cdot T_{jm}} \right)$$
and the total damage is accumulated by Miner’s rule:
$$D = \sum_{i} \frac{n_i}{N_{f,i}}$$
The predicted lifetime \(L_f\) is then defined as the inverse of the annual damage.
For the LCL filter design, the inverter-side inductance \(L_1\) is selected based on the current ripple constraint:
$$L_1 \geq \frac{V_{dc}}{16 \, f_{sw} \, \gamma_c \, \hat{I}}$$
where \(\gamma_c\) is the current ripple factor. The filter capacitor is chosen to limit the absorbed reactive power:
$$C \leq \frac{\lambda_c \, P_{in}}{3 \cdot 2\pi f_{g} \, V_{g}^2}$$
Finally, the grid-side inductance \(L_2\) is determined from harmonic attenuation requirements.
The inductor design follows an iterative procedure based on the area-product method. The core loss is calculated using Steinmetz’s equation:
$$P_{Fe} = K_c f_{sw}^{\alpha} \hat{B}^{\beta} V_c$$
where \(K_c\), \(\alpha\), and \(\beta\) are material constants, and \(V_c\) is the core volume. The copper loss is:
$$P_{Cu} = I_{rms}^2 R_{ac}$$
where \(R_{ac}\) accounts for high-frequency winding resistance.
Device-Level Models
The device-level models define the four main objective functions for the optimization problem: efficiency, lifetime, power density, and special cost.
The system efficiency is defined as:
$$\eta = \frac{P_{out}}{P_{in}} = \frac{P_{in} – P_{loss}}{P_{in}}$$
where \(P_{loss}\) includes all semiconductor and inductor losses.
The power density is computed as:
$$\rho = \frac{P_{in}}{V_{total}}$$
where \(V_{total}\) is the total volume of the power modules, heat sinks, and inductors.
The special cost is expressed in terms of output power per unit cost:
$$\sigma = \frac{P_{in}}{Cost_{total}}$$
where \(Cost_{total}\) is the total cost of the power modules, heat sinks, and inductors.
Additionally, the common-mode EMI constraint is evaluated by adding a balancing inductor and using an impedance balance method. Designs that do not meet the EMI standard are rejected or penalized.
Product-Level Models
To bridge the gap between technical design and commercial profitability, I introduced two product-level indicators: technical advantage \(Y_1\) and all-life-cycle profit \(Y_2\).
The technical advantage is a weighted sum of normalized efficiency, lifetime, and power density:
$$Y_1 = \lambda_1 F_1 + \lambda_2 F_2 + \lambda_3 F_3$$
where \(F_1, F_2, F_3\) are normalized values, and \(\lambda_1, \lambda_2, \lambda_3\) are weights.
The profit is calculated by the net present value method:
$$Y_2 = \frac{1}{Year} \left[ \sum_{t=1}^{Year} \frac{B_t – C_t}{(1+i)^t} – C_A – C_m \right]$$
where \(B_t\) and \(C_t\) are revenue and cost in year \(t\), \(i\) is the discount rate, \(C_A\) is the initial capital cost, and \(C_m\) is the maintenance cost.
Proposed DQ-NSGAIII Algorithm
Conventional multi-objective evolutionary algorithms such as NSGA-II, NSGA-III, and MOEA/D have limitations when applied to complex engineering problems with many objectives and expensive function evaluations. NSGA-II struggles with high-dimensional objective spaces due to the loss of dominance pressure. MOEA/D requires careful weight generation and may fail on irregular Pareto fronts. NSGA-III performs well but suffers from slow convergence and poor diversity when initialized randomly.
To overcome these issues, I propose the DQ-NSGAIII algorithm, which integrates three main enhancements into the NSGA-III framework:
- Quasi-opposition-based learning (QBL) initialization: The initial population is generated by a two-step process. First, a random population is created. Then, the quasi-opposite population is generated. The two populations are merged, and the best individuals are selected based on non-dominated sorting. This improves the initial diversity and accelerates convergence.
- Improved differential evolution (DE) operator: Instead of using simulated binary crossover (SBX) throughout the entire run, the algorithm uses a modified DE operator in the early phase to accelerate exploration, and then switches to GA operators in the later phase to maintain diversity. This results in faster convergence and lower runtime.
- Strengthened dominance relation (SDR): A strengthened dominance relation is used to increase selection pressure in high-dimensional objective spaces. This relation maintains a balance between convergence and diversity by identifying non-dominated solutions in local neighborhoods.
The pseudocode of DQ-NSGAIII is presented as follows:
|
Algorithm: DQ-NSGAIII 1. Initialize population \(P_0\) using QBL 2. For \(t = 0\) to max generation 3. Combine parent and offspring populations \(R_t = P_t \cup Q_t\) 4. Perform non-dominated sorting using SDR relation 5. Select individuals based on reference-point association 6. Generate offspring \(Q_{t+1}\) using DE/GA operators 7. End For |
To evaluate the performance of the proposed algorithm, I used the DTLZ1–DTLZ4 test problems with 3, 5, 8, 10, and 15 objectives. The inverted generational distance (IGD) metric is employed as the performance measure. Table 4 compares the IGD values of DQ-NSGAIII with NSGA-III, MOEA/D, and NSGA-II.
| Function | M | NSGA-III | MOEA/D | NSGA-II | DQ-NSGAIII |
|---|---|---|---|---|---|
| DTLZ1 | 3 | 3.27e-1 | 1.14e-1 | 2.02e-1 | 8.94e-2 |
| 5 | 6.69e-1 | 3.43e-1 | 2.13e+0 | 1.69e-1 | |
| 8 | 7.54e-1 | 3.64e-1 | 3.16e+1 | 3.38e-1 | |
| 10 | 8.17e-1 | 2.74e-1 | 3.45e+1 | 4.72e-1 | |
| 15 | 9.73e-1 | 3.15e-1 | 4.15e+1 | 6.52e-1 | |
| DTLZ4 | 3 | 1.50e-1 | 4.18e-1 | 1.55e-1 | 5.52e-2 |
| 5 | 3.12e-1 | 6.59e-1 | 3.00e-1 | 2.20e-1 | |
| 8 | 4.99e-1 | 9.08e-1 | 1.47e+0 | 4.06e-1 | |
| 10 | 6.01e-1 | 8.86e-1 | 1.50e+0 | 5.37e-1 | |
| 15 | 7.69e-1 | 1.19e+0 | 1.53e+0 | 7.23e-1 |
The results demonstrate that DQ-NSGAIII achieves the best IGD values in most cases, especially for DTLZ1 and DTLZ4, indicating significant improvements in both convergence and diversity.
Multi-Objective Optimization of the Solar Inverter
In this section, I apply the proposed DQ-NSGAIII algorithm to optimize the 140 kW ANPC solar inverter for maximizing efficiency, lifetime, power density, and special cost, while satisfying the common-mode EMI constraint.
Decision Variables and Design Database
The optimization design variables include the switching frequency, current ripple factor, window utilization factor, maximum flux density, power module selection, and core material selection. Table 5 lists the ranges and types of these variables.
| Variable | Range | Step | Unit | Type |
|---|---|---|---|---|
| Switching frequency \(f_{sw}\) | 10–65 | 1 | kHz | Continuous |
| Current ripple factor \(\gamma_c\) | 5–30 | 1 | % | Continuous |
| Window utilization \(k_u\) | 0.3–0.45 | 0.05 | – | Continuous |
| Maximum flux density \(B_{max}\) | 1.0–1.3 | 0.1 | T | Continuous |
| Power module type | 1 or 2 | 1 | – | Discrete |
| Core material | 1 or 2 | 1 | – | Discrete |
Table 6 and Table 7 provide the selected power module and heat sink options, respectively.
| Parameter | Module 1 | Module 2 |
|---|---|---|
| Manufacturer | Vincotech | Infineon |
| Part number | PG12NAB008MR04-LC59F46T PG12NAC008MR04-LC69F46T |
F3L11MR-12W2M1 |
| Voltage / Current | 1200 V / 150 A | 1200 V / 100 A |
| Max junction temperature | 175 °C | 150 °C |
| Cooling | Forced air | Water cooled |
| Cost | 181×2 USD | 150 USD |
| Volume | 0.066×2 dm³ | 0.059 dm³ |
| Type | Part number | Volume (dm³) | Cost (USD) |
|---|---|---|---|
| Water cooled | 193AB2500B | 1.36 | 374 |
| Forced air | 416601U00000G | 4.80 | 156 |
Objective Function Relationships
Before presenting the final Pareto front, I analyzed the pairwise and triple-wise relationships among the four objectives. Figure 1 shows a sample of the relationships between efficiency, power density, lifetime, and special cost. The data points are colored by switching frequency. Clear trade-offs are observed, particularly between efficiency and power density, and between lifetime and special cost.
The switching frequency is the most influential design variable. Increasing \(f_{sw}\) reduces inductor volume and cost but increases switching losses, which may lower efficiency. However, the efficiency does not monotonically decrease because higher frequencies reduce the high-frequency core loss in the inductor.
Pareto Front Results
After running the DQ-NSGAIII algorithm with a population size of 100 and 100 generations, I obtained the four-dimensional Pareto front. Since a four-dimensional space cannot be visualized directly, I used parallel coordinates with normalized objective values. The ranges of the objectives are: efficiency from 98.06% to 98.68%, lifetime from 0.2 to 88.5 years, power density from 16 to 47 kW/dm³, and special cost from 100 to 188 kW/USD.
Table 8 summarizes several representative optimal design points from the Pareto front.
| Description | A: Max η | B: Max \(L_f\) | C: Max ρ | D: Max σ | E: Compromise |
|---|---|---|---|---|---|
| \(f_{sw}\) (kHz) | 28 | 10 | 49 | 65 | 23 |
| \(\gamma_c\) (%) | 19 | 14 | 17 | 29 | 23 |
| \(k_u\) | 0.45 | 0.40 | 0.45 | 0.45 | 0.45 |
| \(B_{max}\) (T) | 1.3 | 1.2 | 1.3 | 1.3 | 1.2 |
| Module type | 1 | 1 | 2 | 2 | 1 |
| Core material | 1 | 2 | 1 | 2 | 1 |
| Efficiency (%) | 98.68 | 97.84 | 98.25 | 97.91 | 98.62 |
| Lifetime (years) | 13.7 | 88.5 | 4.6 | 1.4 | 17.9 |
| Power density (kW/dm³) | 17 | 12 | 47 | 34 | 18 |
| Special cost (kW/USD) | 1400 | 1945 | 795 | 749 | 1478 |
| Junction temperature (°C) | 107 | 92 | 125 | 135 | 103 |
To make the Pareto front more interpretable, I projected the four-dimensional front onto the product-level plane (technical advantage versus profit). Figure 2 shows the resulting two-dimensional Pareto front, where the trade-off between technical performance and economic profit is clearly visible.
I selected a compromise solution with \(f_{sw} = 33\) kHz, \(\gamma_c = 28\%\), \(k_u = 0.45\), \(B_{max} = 1.3\) T, module type 1, and core material 1. This solution achieves an efficiency of 98.64%, a lifetime of 8.7 years, a power density of 17.5 kW/dm³, and a special cost of 1340 kW/USD. The detailed loss breakdown is given in Table 9.
| Loss component | Value (W) | Percentage (%) |
|---|---|---|
| IGBT conduction loss | 197 | 10.38 |
| MOSFET conduction loss | 366 | 19.25 |
| MOSFET switching loss | 248 | 13.08 |
| Inductor \(L_1\) loss | 549 | 28.91 |
| Inductor \(L_2\) loss | 540 | 28.39 |
| Total loss | 1900 | 100 |
Experimental Verification
To validate the efficiency model and the EMI suppression method, I built a 140 kW rated three-phase ANPC solar inverter prototype according to the optimal design. Figure 3 shows the experimental prototype with its circuit schematic. The main components are labeled, including the DC source, DC-link capacitors, power module board, auxiliary power board, control board, gate driver board, sensing boards, LCL filter inductors, and EMC board.
The prototype was tested under several low-power operating points because the laboratory power supply was limited. Table 10 gives the test conditions for two groups of experiments: varying switching frequency and varying input power.
| Point | \(P_{in}\) (kW) | \(V_{dc}\) (V) | \(m\) | \(f_{sw}\) (kHz) |
|---|---|---|---|---|
| A | 11.07 | 500 | 0.9 | 25 |
| B | 11.00 | 500 | 0.9 | 30 |
| C | 10.91 | 500 | 0.9 | 35 |
| D | 10.86 | 500 | 0.9 | 40 |
| E | 6.93 | 400 | 0.9 | 40 |
| F | 8.78 | 450 | 0.9 | 40 |
| G | 10.86 | 500 | 0.9 | 40 |
| H | 13.14 | 550 | 0.9 | 40 |
The measured efficiency values are compared with the theoretical predictions in Figure 4. The maximum error is about 0.25 percentage points. The discrepancy is primarily attributed to unmodelled losses such as high-frequency winding losses due to skin and proximity effects, core losses in the DC-link capacitors, filter capacitor losses, and temperature-dependent conduction losses.
Finally, I tested the common-mode EMI suppression by adding a balancing inductor \(L_0 = 5.3\,\mu H\) and using an RLC impedance balance network. The common-mode noise spectrum measured at the LISN resistor is shown in Figure 5. In the frequency range from 150 kHz to 15 MHz, the common-mode noise is reduced by up to 20 dBμV, confirming the effectiveness of the impedance balance method.
Conclusion
In this paper, I presented a comprehensive multi-objective optimization framework for solar inverters based on the DQ-NSGAIII algorithm. The framework includes component-level, device-level, and product-level models, enabling simultaneous optimization of efficiency, lifetime, power density, special cost, and EMI compliance. The proposed DQ-NSGAIII algorithm improves convergence and diversity through QBL-based initialization, an improved DE crossover, and the strengthened dominance relation. The algorithm was validated on benchmark functions and then applied to a 140 kW ANPC solar inverter. Experimental results confirm the accuracy of the efficiency model and the effectiveness of the EMI suppression method. This work provides a systematic approach for designing high-performance and cost-effective solar inverters in practical applications.