The global proliferation of photovoltaic (PV) generation has driven significant advancements in solar inverter technology. Among various system architectures, transformerless solar inverters have gained dominance in the distributed and string inverter markets due to their higher conversion efficiency, lower weight, and reduced cost compared to their isolated counterparts. However, the absence of galvanic isolation introduces a critical challenge: the generation of substantial ground leakage current. This current flows through the inherent parasitic capacitance between the PV panels and earth ground, posing safety risks, injecting harmonics into the grid, and constituting a major source of electromagnetic interference (EMI). This analysis delves into the mechanism of ground leakage current, reviews conventional mitigation strategies, and introduces a novel suppression technique based on coupled inductors, providing comprehensive theoretical, simulation, and experimental validation.
The primary source of leakage current in a transformerless solar inverter system is the high-frequency common-mode (CM) voltage exciting the PV panel’s parasitic capacitance to ground ($$C_{pv}$$). The leakage current $$i_{cm}$$ is directly governed by the equation:
$$i_{cm} = C_{pv} \frac{dV_{cm}}{dt}$$
where $$V_{cm}$$ is the common-mode voltage applied across $$C_{pv}$$. For a standard single-phase H-bridge (H4) solar inverter employing unipolar sinusoidal pulse-width modulation (SPWM), the generation of $$V_{cm}$$ can be analyzed. In this modulation scheme, two switches operate at high frequency while the other two switch at grid frequency. This switching action creates high-frequency alternating voltages, $$V_{ao}$$ and $$V_{bo}$$, between the inverter bridge legs (points a, b) and the DC-link midpoint (point O). These voltages, in conjunction with the filter inductors ($$L_1$$, $$L_2$$), the grid, and $$C_{pv}$$, form a resonant circuit for leakage current.
The common-mode voltage $$V_{cm}$$ for this system can be approximated as the average of the two bridge leg voltages relative to the DC-link midpoint:
$$V_{cm} \approx \frac{V_{ao} + V_{bo}}{2}$$
Under unipolar SPWM, $$V_{ao}$$ and $$V_{bo}$$ are complementary high-frequency square waves, resulting in a high $$dV_{cm}/dt$$ and consequently, a large leakage current $$i_{cm}$$. Simulation of a typical 3kW system (400V DC, 1mH filter inductors, 20kHz switching, $$C_{pv}=300nF$$) confirms this, showing significant CM voltage and current components at the switching frequency and its harmonics.
| Operating Mode | Active Switches | $$V_{ao}$$ | $$V_{bo}$$ | $$V_{cm} \approx (V_{ao}+V_{bo})/2$$ | Leakage Current Path |
|---|---|---|---|---|---|
| Positive Half-Cycle (Active) | S1, S4 | $$V_{pv}$$ (PWM) | 0 | $$V_{pv}/2$$ (PWM) | Via $$C_{pv}$$, grid, $$L_1$$, $$L_2$$ |
| Positive Half-Cycle (Freewheeling) | S2, S3 Diodes | 0 | $$V_{pv}$$ | $$V_{pv}/2$$ | Via $$C_{pv}$$, $$L_2$$ |
To mitigate this issue and comply with safety standards (e.g., VDE0126-1-1, IEC 60755), various techniques have been developed, primarily falling into two categories: modulation-based and topology-based methods.
Modulation-Based Methods: The most straightforward approach is to use bipolar SPWM, where all four switches operate at high frequency. In this mode, $$V_{ao}$$ and $$V_{bo}$$ are always complementary, making their sum constant (equal to the DC-link voltage $$V_{pv}$$). Therefore, $$V_{cm} = V_{pv}/2$$, a constant value with near-zero high-frequency content, effectively eliminating leakage current. However, this comes at the cost of doubled switching losses for the power devices and significantly higher core losses in the filter inductors due to a larger flux swing ($$\Delta B$$), resulting in lower overall system efficiency.
Topology-Based Methods: These methods modify the power circuit to decouple the PV array from the AC side during freewheeling periods or to clamp the CM voltage to a constant potential. Popular topologies include:
- H5 Topology (SMA): Adds a fifth switch in the DC path. It disconnects the DC source during freewheeling, forcing current to circulate only on the AC side, thus stabilizing $$V_{cm}$$.
- H6/Heric Topology (Sunways): Adds two switches and anti-series diodes between the AC output legs. These create an AC short-circuit during freewheeling, achieving similar decoupling.
- Half-Bridge & T-Type 3-Level Topologies: Utilize a split DC-link capacitor to create a neutral point, which is connected to the grid neutral. This directly clamps the CM voltage to a fixed mid-point potential ($$V_{pv}/2$$).
- Neutral Point Clamped (NPC) Topology: Uses capacitors on the AC side to create a virtual neutral connected to the PV negative terminal, clamping $$V_{cm}$$ to a low-ripple voltage.
While effective, these topologies increase system complexity, component count, and cost due to additional active switches or large DC-link capacitors.
| Mitigation Technique | Key Mechanism | Leakage Current Performance | Efficiency Impact | Complexity/Cost |
|---|---|---|---|---|
| Bipolar SPWM (H4) | Constant $$V_{cm}=V_{pv}/2$$ | Excellent | Lower (High switching & core loss) | Low (Control change only) |
| H5 Topology | DC-AC decoupling in freewheel | Excellent | Moderate (5 switches) | Moderate (1 extra switch) |
| H6/Heric Topology | AC short-circuit in freewheel | Excellent | Moderate (6 switches) | Moderate (2 extra switches) |
| Half-Bridge / 3-Level | Mid-point clamping to grid neutral | Excellent | High (Good soft-switching potential) | High (Extra caps, complex control) |
I propose a novel, passive suppression technique that leverages the existing filter inductors in the solar inverter, requiring no additional active power switches and maintaining the original unipolar SPWM control scheme. The core idea is to construct a compensatory current path that shunts the high-frequency CM current away from the parasitic capacitance $$C_{pv}$$.
The implementation involves modifying the two output filter inductors ($$L_1$$, $$L_2$$) into coupled inductors. An additional winding is added to each inductor core, magnetically coupled to the main power winding. These auxiliary windings ($$L_{11}$$, $$L_{21}$$) are then connected in series with compensation capacitors ($$C_4$$, $$C_3$$), and this series combination is tied between the DC-link negative terminal (or positive) and the junction of the two main inductors.
The principle of operation is based on modifying the impedance of the leakage current path. During the active phase (e.g., positive half-cycle with S1 PWM), the high-frequency voltage $$V_{ao}$$ drives current through two parallel branches to ground: one through $$C_{pv}$$ and another through the newly formed compensatory branch ($$L_{11}$$-$$C_4$$). By proper design, the impedance of the compensatory branch at the switching frequency is made very low compared to the impedance of the $$C_{pv}$$ path. Consequently, the majority of the high-frequency CM current is diverted through this branch, drastically reducing the current through $$C_{pv}$$.
To analyze the effect, consider a simplified model for the positive half-cycle, assuming ideal coupling (k=1) and equal inductance ($$L_1 = L_{11}$$). The compensatory capacitor $$C_4$$ appears in parallel with $$C_{pv}$$ from the perspective of the CM voltage source $$V_{ao}$$. The effective capacitance in the CM path becomes $$C_{pv} + C_4$$. The leakage current is then:
$$i_{cm} = (C_{pv} + C_4) \frac{dV’_{cm}}{dt}$$
where $$V’_{cm}$$ is the new, reduced common-mode voltage. The CM voltage division is now between the inductive impedance of $$L_1$$ and the capacitive impedance of the parallel combination $$(C_{pv} + C_4)$$. Increasing $$C_4$$ decreases the capacitive impedance, causing a larger portion of $$V_{ao}$$ to drop across $$L_1$$, thereby reducing $$V’_{cm}$$. A more precise analytical model, considering mutual inductance $$M$$, yields the following transfer function for $$V_{cm}$$:
$$
\begin{aligned}
& Z_1 = j\omega(L_{11} – M) + \frac{1}{j\omega C_4}, \quad Z_2 = j\omega(L_1 – M) + \frac{j\omega L_2 \cdot \frac{1}{j\omega C_{pv}}}{j\omega L_2 + \frac{1}{j\omega C_{pv}}} \\
& Z = j\omega M + \frac{Z_1 Z_2}{Z_1 + Z_2}, \quad I = \frac{V_{ao}}{Z}, \quad V_2 = V_{ao} – I \cdot j\omega M \\
& I_2 = \frac{V_2}{Z_2}, \quad V_{cm} = I_2 \cdot \frac{j\omega L_2 \cdot \frac{1}{j\omega C_{pv}}}{j\omega L_2 + \frac{1}{j\omega C_{pv}}}
\end{aligned}
$$
Parameter sensitivity analysis reveals the relationship between key variables and the suppression performance. The coupling coefficient $$k$$ (typically 0.989-0.994 for well-constructed powder core inductors) has a minor influence. The compensation capacitance $$C_4$$ and the turns ratio of the auxiliary winding are the primary design parameters. As $$C_4$$ increases, $$V_{cm}$$ monotonically decreases. Furthermore, for a given $$C_4$$, an optimal auxiliary winding inductance exists that can theoretically nullify the CM voltage at the switching frequency.
| Parameter | Variation Range | Effect on CM Voltage ($$V_{cm}$$) at 20kHz | Design Guideline |
|---|---|---|---|
| Coupling Coefficient (k) | 0.96 to 1.0 | Minor increase as k → 1 | Maximize for effective coupling (aim >0.99) |
| Compensation Cap (C4) | 100 nF to 1000 nF | Strong decrease with increasing C4 | Select based on desired attenuation vs. component stress |
| Auxiliary Winding Inductance (L11) | 0.5L1 to 2L1 | Exhibits a minimum (zero) at optimal value | Tune in conjunction with C4 for optimal suppression |
Simulation of the proposed solar inverter system validates the theoretical analysis. Using the same 3kW system parameters with added coupled windings ($$L_{11}=L_{21}=1.16mH$$, k=0.99) and compensation capacitors ($$C_3=C_4=300nF$$), the results show a dramatic reduction in leakage current. The peak CM current at 20kHz decreased from 1.75A (without compensation) to 0.35A (with compensation), and the corresponding CM voltage reduced from 47V to 9.3V. A sweep of $$C_4$$ from 100nF to 1000nF confirmed the monotonic improvement in suppression performance.
The proposed technique was experimentally validated on a commercial 3kW transformerless solar inverter based on the H4 topology. The output EMI filter was bypassed, and an external 330nF capacitor simulated $$C_{pv}$$. The standard filter inductors were modified with an auxiliary winding of equal turns. A 900nF compensation capacitor was connected as per the proposed schematic.
| Test Condition | Parameter | Value |
|---|---|---|
| Inverter & Load | Topology | H4 Bridge, Unipolar SPWM |
| Power Rating | 3 kW | |
| DC Link Voltage | ~400 V | |
| Output | 230V AC Grid | |
| Simulated $$C_{pv}$$ | 330 nF | |
| Compensation Setup | Auxiliary Winding | Same turns as main inductor |
| Compensation Capacitor (C4) | 900 nF | |
| Connection | Series with winding to DC- |
The ground leakage current was measured directly. Without compensation, the current waveform displayed significant high-frequency noise with an RMS value of 461 mA. With the coupled inductor compensation activated, the high-frequency noise was virtually eliminated, and the RMS leakage current dropped to 92.9 mA, a reduction of nearly 80%.
Furthermore, the impact on conducted EMI was evaluated. In the baseline configuration (with the main output CM choke), the system met EMC standards. To stress-test the improvement, the main CM choke was removed, leaving only a small one. The EMI scan without compensation showed exceedances in the 150kHz-2MHz range. The same scan with compensation showed remarkable suppression in this low-frequency range, with margins exceeding 15 dB below the limit line. This confirms that the proposed method effectively mitigates the dominant CM noise source originating from the switching-frequency leakage current.
| Performance Metric | Without Compensation | With Coupled Inductor Compensation | Improvement |
|---|---|---|---|
| Leakage Current (RMS) | 461 mA | 92.9 mA | ~80% Reduction |
| CM Voltage @ 20kHz (Sim.) | 47 V | 9.3 V | ~80% Reduction |
| CM Current @ 20kHz (Sim.) | 1.75 A | 0.35 A | ~80% Reduction |
| EMI (150k-2MHz range) | Exceeded Limits* | Within Limits, >15dB margin | Major Suppression |
This work presents a novel, effective, and practical method for suppressing ground leakage current in transformerless solar inverters. The technique utilizes the existing magnetic components by adding coupled auxiliary windings and small compensation capacitors to create a passive compensatory current path. It requires no change to the efficient unipolar SPWM control strategy and adds no active semiconductor devices, preserving system efficiency and cost structure. The method is particularly effective against leakage current and its associated CM EMI in the frequency range dominated by the switching frequency and its lower-order harmonics (typically below 2 MHz). For very high-frequency EMI noise ( >2 MHz) caused by other parasitic couplings, the influence of the coupled inductor’s own stray parameters may become significant and warrants separate investigation. Overall, this coupling inductor-based approach offers a compelling solution to enhance the safety and EMI performance of mainstream single-phase transformerless solar inverters.