Research on Leakage Current Suppression in a Novel Three-Phase Buck-Boost Solar Inverter

In recent years, the demand for renewable energy sources has surged, with photovoltaic (PV) systems playing a pivotal role due to their cleanliness and accessibility. At the heart of these systems lie solar inverters, which convert DC power from PV panels into AC power for grid integration or local consumption. The efficiency, reliability, and safety of these solar inverters are critical factors in the widespread adoption of PV technology. Traditional isolated solar inverters incorporate transformers to provide electrical isolation, but this adds bulk, weight, and reduces overall efficiency. Consequently, transformerless solar inverters have gained attention for their compact size and higher efficiency. However, the absence of galvanic isolation in transformerless solar inverters introduces a significant challenge: leakage currents. These currents can lead to electromagnetic interference (EMI) and pose safety hazards, such as electric shock risks. Therefore, suppressing leakage currents is essential for the practical deployment of transformerless solar inverters.

In this paper, we propose a novel three-phase Buck-Boost solar inverter designed to mitigate leakage currents while offering voltage step-up and step-down capabilities. This topology is particularly suitable for PV applications where the DC input voltage can vary widely due to environmental factors like shading or temperature changes. Unlike conventional voltage-source inverters (VSIs) or current-source inverters (CSIs), our inverter combines the advantages of Buck-Boost conversion with three-phase output, enabling flexible voltage adaptation. We will delve into the topology’s construction, operational principles, and analytical models to demonstrate its leakage current suppression performance. Throughout this discussion, we will emphasize the role of solar inverters in modern energy systems and how our design addresses key limitations.

The proposed solar inverter topology is derived from integrating a Buck-Boost converter with a three-phase bridge configuration. This integration allows for both step-up and step-down operations, making it versatile for various PV system requirements. The basic structure involves DC input from PV panels, two inductors (Ldc1 and Ldc2) for energy storage, a set of switches (T1 to T9) and diodes (D1 to D9), and three-phase output with filter capacitors (CA, CB, CC) and inductors (LA, LB, LC). The key innovation lies in the addition of switches T7, T8, and T9, along with diodes D7, D8, and D9, which help decouple the input and output sides during certain switching states, thereby reducing common-mode voltages and leakage currents. The DC midpoint is connected to the AC filter capacitor center, enhancing stability. This configuration ensures that the solar inverter maintains a constant common-mode voltage, which is crucial for leakage current suppression.

To understand the operation of this solar inverter, we analyze its working modes over a 60° interval of the three-phase output waveform. The output voltages are sinusoidal, and their magnitudes change every 60°, dividing the cycle into six regions (I to VI). In each region, the inverter exhibits three primary switching modes: a zero state (where T7, T8, and T9 are on) and two non-zero states (where specific bridge switches are on). For instance, in Region I, where phase A voltage is positive and highest, the modes are as follows:

Mode Switching State Description
1 T7, T8, T9 ON; T1-T6 OFF DC inductors charge from input; output currents supplied by capacitors.
2 T1, T2 ON; others OFF DC inductors discharge through phases A and C; phase B current from capacitors.
3 T2, T3 ON; others OFF DC inductors discharge through phases B and C; phase A current from capacitors.

These modes resemble the operation of a Buck-Boost converter: the zero state corresponds to the switch-on period (charging inductors), and non-zero states correspond to switch-off (discharging inductors to the load). This analogy simplifies control and modulation. For solar inverters, such operational flexibility is vital to handle fluctuating PV output voltages efficiently.

The modulation strategy employs sinusoidal pulse-width modulation (SPWM) with a pre-decoupled reference waveform to generate switching signals. The pre-decoupling ensures that the modulation waves are phase-shifted by 30° relative to standard sine waves, which is common in current-source solar inverters to achieve proper current shaping. The modulation index m defines the ratio of the modulation wave amplitude to the carrier amplitude, influencing the output voltage magnitude. By adjusting m, the solar inverter can operate in step-up or step-down modes, as we will analyze mathematically later. This SPWM approach is straightforward to implement using digital signal processors (DSPs) or field-programmable gate arrays (FPGAs), making it practical for real-world solar inverter applications.

Leakage currents in transformerless solar inverters arise due to varying common-mode voltages (CMVs) that drive currents through parasitic capacitances between PV panels and ground. The CMV is defined as the average of the three-phase output voltages relative to the DC bus negative terminal. For our solar inverter, we derive the CMV expression to assess leakage current suppression. Let UAN, UBN, and UCN be the voltages from phases A, B, and C to point N (DC negative). Then:

$$U_{cm} = \frac{U_{AN} + U_{BN} + U_{CN}}{3}$$

In Mode 1 (zero state), the midpoint voltage between diodes D7 and D8 is clamped to half the input voltage Udc, i.e., UnN = Udc/2. Since the AC filter capacitor center is connected to this midpoint, the phase voltages relative to point o (the capacitor center) sum to zero: UAo + UBo + UCo = 0. Thus, UAN = UAo + Udc/2, and similarly for other phases. Substituting into the CMV equation yields:

$$U_{cm} = \frac{U_{dc}}{2}$$

In Modes 2 and 3 (non-zero states), the same clamping effect holds, so Ucm remains Udc/2. This constancy across all switching modes ensures that the CMV does not contain high-frequency components, which are primary drivers of leakage currents. The table below summarizes the switching states and CMV for all seven possible modes (including variations across regions):

State T1-T6 States T7-T9 States UAN UBN UCN Ucm
1 000000 111 Udc/2 + UAo Udc/2 + UBo Udc/2 + UCo Udc/2
2 110000 000 Udc/2 + UAo Udc/2 + UBo Udc/2 + UCo Udc/2
3 011000 000 Udc/2 + UAo Udc/2 + UBo Udc/2 + UCo Udc/2
4 000110 000 Udc/2 + UAo Udc/2 + UBo Udc/2 + UCo Udc/2
5 000011 000 Udc/2 + UAo Udc/2 + UBo Udc/2 + UCo Udc/2
6 100001 000 Udc/2 + UAo Udc/2 + UBo Udc/2 + UCo Udc/2
7 001100 000 Udc/2 + UAo Udc/2 + UBo Udc/2 + UCo Udc/2

As shown, Ucm is consistently Udc/2, regardless of switching state. This stability minimizes the voltage across parasitic capacitances, thereby suppressing leakage currents. For solar inverters, meeting safety standards like VDE0126-1-1, which limits leakage currents to below 30 mA RMS, is crucial, and our design inherently satisfies this requirement through CMV constancy.

Next, we analyze the step-up and step-down capability of this solar inverter, which is essential for adapting to varying PV output voltages. The input-output voltage relationship can be derived by considering the equivalent Buck-Boost behavior. In Region I, the circuit reduces to a single-phase equivalent with input voltage Udc, switch duty cycle D for T7-T9, and output voltage Uo1m (peak line-to-line voltage). For a Buck-Boost converter, the fundamental output voltage amplitude relates to the input as:

$$\frac{U_{o1m}}{U_{dc}} = \frac{D}{1-D} \times \frac{4}{\pi}$$

To find D, we link it to the modulation index m. The pre-decoupled modulation waves are: va = k sin(ωt – 30°), vb = k sin(ωt – 150°), vc = k sin(ωt + 90°), where k is the amplitude and m = k/l (l is carrier amplitude). The duty cycle for phase A in Region I is da = (va – vb)/(2l), which simplifies to:

$$d_a = \frac{\sqrt{3}}{2} m \sin(\omega t)$$

The average duty cycle D’ over 60° (e.g., from 60° to 120°) for the bridge switches is:

$$D’ = \frac{3}{\pi} \int_{60^\circ}^{120^\circ} \frac{\sqrt{3}}{2} m \sin(\omega t) \, d(\omega t) = \frac{3\sqrt{3}}{2\pi} m$$

Since the duty cycle of T7-T9 (D) complements that of the bridge switches in Region I, we have D = 1 – D’ for the active switches, but careful analysis shows that D relates to the zero-state duration. Actually, T7-T9 conduct during the zero state, and their duty cycle D equals the complement of the sum of bridge switch duty cycles. From symmetry, D can be expressed as:

$$D = \frac{2\pi – 3\sqrt{3} m}{2\pi}$$

Substituting into the Buck-Boost relation gives:

$$\frac{U_{o1m}}{U_{dc}} = \frac{8\pi – 12\sqrt{3} m}{3\sqrt{3} \pi m}$$

Since Uo1m is the line-to-line voltage peak, the phase voltage peak Ua = Uo1m/√3. Thus:

$$\frac{U_a}{U_{dc}} = \frac{8\pi – 12\sqrt{3} m}{9\pi m}$$

This equation defines the voltage transfer ratio as a function of m. For linear modulation, m ranges from 0 to 1. When m = 0.512, Ua/Udc = 1, indicating no voltage change. For m > 0.512, the ratio is less than 1 (step-down), and for m < 0.512, it is greater than 1 (step-up). This flexibility is advantageous for solar inverters, as PV panel voltages can drop below or rise above grid requirements depending on irradiation and temperature. The plot below illustrates this relationship (though rendered mathematically here):

$$ \text{For } m \in (0,1), \quad \frac{U_a}{U_{dc}} = \frac{8\pi – 12\sqrt{3} m}{9\pi m} $$

We can compute sample values: if m = 0.4, Ua/Udc ≈ 1.25 (step-up); if m = 0.8, Ua/Udc ≈ 0.75 (step-down). Thus, by simply adjusting m, this solar inverter can accommodate a wide input voltage range, enhancing its suitability for diverse PV installations.

To validate our theoretical analysis, we conducted simulations using PSIM software and built an experimental prototype. The parameters were set as follows: DC inductors Ldc1 = Ldc2 = 10 mH, switching frequency fs = 20 kHz, filter inductors LA = LB = LC = 3 mH, filter capacitors CA = CB = CC = 20 μF, and load resistance 25 Ω for open-loop tests. For leakage current assessment, parasitic capacitances of 100 nF were added between PV panels and ground, mimicking real-world conditions. The control was implemented via a DSP (TMS320F2812) and FPGA (XC6SLX9) platform, generating SPWM signals with pre-decoupling.

Simulation results confirmed the step-up and step-down functionality. With Udc = 100 V and m = 0.4, the output phase voltages peaked around 125 V (step-up), while with m = 0.8, they peaked around 75 V (step-down). The total harmonic distortion (THD) of output voltages was below 1%, meeting power quality standards for solar inverters. The CMV remained constant at 50 V (Udc/2) in all cases, leading to leakage currents with peaks under 300 mA and RMS values below 30 mA, compliant with VDE0126-1-1. Grid-connected simulations with 80 V RMS grid voltage and current control loops showed sinusoidal currents in phase with grid voltages, with THD < 5%, satisfying IEEE 1547 standards for solar inverter interconnection.

Experimental tests mirrored simulation outcomes. The prototype used the same parameters, and measurements were taken with oscilloscopes and power analyzers. Open-loop tests demonstrated stable output waveforms with low distortion. The CMV was measured consistently at half the input voltage, and leakage currents were minimal. Grid-tied experiments with closed-loop current control achieved unity power factor and low harmonic injection. The table below summarizes key performance metrics:

Parameter Simulation Value Experimental Value
Input Voltage Udc 100 V 100 V
Modulation Index m 0.4 (step-up), 0.8 (step-down) 0.45 (step-up), 0.75 (step-down)
Output Phase Voltage Peak 125 V (step-up), 75 V (step-down) ~120 V (step-up), ~70 V (step-down)
CMV (Ucm) 50 V 50 V
Leakage Current Peak < 300 mA < 300 mA
Leakage Current RMS < 30 mA 14.70 mA
Output THD (Open-loop) < 1% < 5%
Grid Current THD (Closed-loop) 2.35% 4.53%

These results underscore the efficacy of our solar inverter in suppressing leakage currents while providing voltage adaptation. The simplicity of SPWM modulation, combined with the topological design, makes it a compelling choice for transformerless PV systems. Compared to existing solar inverters like H5, H6, or HERIC topologies for single-phase, or NPC for three-phase, our Buck-Boost solar inverter offers inherent step-up/step-down capability without additional DC-DC stages, reducing component count and improving efficiency. Moreover, the use of inductors instead of large electrolytic capacitors on the DC side enhances reliability and lifespan, addressing common failure points in solar inverters.

In conclusion, we have presented a novel three-phase Buck-Boost solar inverter that effectively suppresses leakage currents through constant common-mode voltage maintenance. The topology integrates Buck-Boost conversion principles with a three-phase bridge, enabling both step-up and step-down operations via simple SPWM control. Mathematical analysis derived the CMV expression and voltage transfer ratio, confirming leakage current mitigation and flexible voltage adaptation. Simulations and experimental tests validated the theoretical predictions, showing compliance with safety and power quality standards. This solar inverter design offers a robust solution for transformerless PV applications, particularly where input voltage variations are prevalent. Future work could explore advanced modulation techniques, integration with maximum power point tracking (MPPT) algorithms, and scalability for higher power solar inverter systems. Ultimately, such innovations contribute to the advancement of solar inverters, driving the adoption of clean energy worldwide.

The development of efficient and safe solar inverters remains critical for the growth of photovoltaic energy. Our research highlights the importance of topological innovation in addressing leakage current challenges, paving the way for more reliable transformerless solar inverters. As the demand for renewable energy escalates, continuous improvements in solar inverter technology will play a vital role in achieving sustainable power systems.

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