As the global demand for clean energy surges due to escalating environmental pollution and energy crises, photovoltaic (PV) power generation has emerged as a pivotal distributed energy resource. In this context, solar inverters, which serve as the critical interface between PV arrays and the grid, play an indispensable role in determining system efficiency and power quality. The modulation strategy employed in these solar inverters directly influences key performance metrics such as total harmonic distortion (THD), switching losses, and overall energy conversion efficiency. This article delves into a generalized modulation technique based on zero-sequence component injection, unifying Continuous Pulse Width Modulation (CPWM) and Discontinuous Pulse Width Modulation (DPWM) for three-phase grid-connected solar inverters. I will explore the theoretical foundations, practical implementation, and validation of this method, which offers seamless transitions between equivalent Space Vector PWM (SVPWM), DPWM1, and DPWM3 schemes, thereby providing remarkable flexibility and simplicity for high-power solar inverter applications.
The fundamental topology of a three-phase two-level voltage source inverter (VSI) commonly used in solar power systems is considered. The DC link, often fed by PV panels, is connected to the inverter bridge, whose AC outputs are filtered and coupled to the grid via inductors or LCL filters. The primary goal is to synthesize high-quality sinusoidal currents while minimizing losses. The mathematical model in the stationary abc-frame is given by:
$$ e_a – L\frac{di_a}{dt} = \frac{U_{dc}}{2} \cdot U_{a\_ref} = u_{ao} + u_{on} $$
$$ e_b – L\frac{di_b}{dt} = \frac{U_{dc}}{2} \cdot U_{b\_ref} = u_{bo} + u_{on} $$
$$ e_c – L\frac{di_c}{dt} = \frac{U_{dc}}{2} \cdot U_{c\_ref} = u_{co} + u_{on} $$
Here, \(e_a, e_b, e_c\) are the grid voltages, \(i_a, i_b, i_c\) are the inverter output currents, \(L\) is the filter inductance, \(U_{dc}\) is the DC-link voltage, \(u_{ao}, u_{bo}, u_{co}\) are the pole voltages, \(u_{on}\) is the zero-sequence voltage, and \(U_{a\_ref}, U_{b\_ref}, U_{c\_ref}\) are the sinusoidal reference voltages. Transformation into the synchronous dq-rotating frame aligned with the grid voltage vector simplifies control design:
$$ e_d = L\frac{di_d}{dt} – \omega L i_q + \frac{U_{dc}}{2} \cdot U_{d\_ref} $$
$$ e_q = L\frac{di_q}{dt} + \omega L i_d + \frac{U_{dc}}{2} \cdot U_{q\_ref} $$
where \(\omega\) is the grid angular frequency. A standard voltage-oriented control (VOC) structure is utilized, with an outer DC-link voltage loop and inner current loops in the dq-frame, generating the reference voltages for modulation. This control framework is essential for maintaining stable operation and high power factor in grid-connected solar inverters.
The core of this discussion lies in the carrier-based modulation with zero-sequence injection. The normalized three-phase sinusoidal references are:
$$ u_{a\_ref} = m \cos(\theta) $$
$$ u_{b\_ref} = m \cos(\theta – 2\pi/3) $$
$$ u_{c\_ref} = m \cos(\theta + 2\pi/3) $$
where \(m\) is the modulation index (\(0 \leq m \leq 1.15\) for SVPWM equivalence). The modified reference signals for PWM generation are formed by adding a zero-sequence component \(u_z\):
$$ u_a^* = u_{a\_ref} + u_z, \quad u_b^* = u_{b\_ref} + u_z, \quad u_c^* = u_{c\_ref} + u_z $$
The zero-sequence component is calculated as:
$$ u_z = -k u_{max} – (1-k) u_{min} + 2k – 1 $$
with \(u_{max} = \max(u_{a\_ref}, u_{b\_ref}, u_{c\_ref})\) and \(u_{min} = \min(u_{a\_ref}, u_{b\_ref}, u_{c\_ref})\). The parameter \(k\) is the distribution coefficient. For \(k=0.5\), this simplifies to \(u_z = -0.5(u_{max} + u_{min})\), which yields the classic seven-segment SVPWM equivalent modulation, a CPWM technique. This approach inherently enhances DC-link voltage utilization by approximately 15.5% compared to sinusoidal PWM and reduces current ripple, making it highly suitable for high-performance solar inverters.
To improve efficiency, especially in high-power solar inverters where switching losses constitute a significant portion of total losses, DPWM strategies are advantageous. DPWM eliminates switching actions in one inverter leg for specific 60° intervals per fundamental cycle, thereby reducing switching losses. The key is to manipulate \(u_z\) by varying \(k\) based on the sector of the reference voltage vector. The 12-sector vector diagram is used for sector determination, as shown in Table 1, which summarizes the sector identification logic based on the polarities and magnitudes of the reference voltages.
| Sector | Condition Based on \(u_{a\_ref}, u_{b\_ref}, u_{c\_ref}\) | Phase with Maximum/Minimum |
|---|---|---|
| 1 | \(u_{a\_ref} > 0, u_{b\_ref} < 0, u_{c\_ref} < 0, |u_{a\_ref}| \geq |u_{b\_ref}|, |u_{a\_ref}| \geq |u_{c\_ref}|\) | Max: A |
| 2 | \(u_{a\_ref} > 0, u_{b\_ref} > 0, u_{c\_ref} < 0, |u_{c\_ref}| \geq |u_{a\_ref}|, |u_{c\_ref}| \geq |u_{b\_ref}|\) | Min: C |
| 3 | \(u_{a\_ref} > 0, u_{b\_ref} > 0, u_{c\_ref} < 0, |u_{b\_ref}| \geq |u_{a\_ref}|, |u_{b\_ref}| \geq |u_{c\_ref}|\) | Max: B |
| 4 | \(u_{a\_ref} < 0, u_{b\_ref} > 0, u_{c\_ref} < 0, |u_{b\_ref}| \geq |u_{a\_ref}|, |u_{b\_ref}| \geq |u_{c\_ref}|\) | Max: B |
| 5 | \(u_{a\_ref} < 0, u_{b\_ref} > 0, u_{c\_ref} > 0, |u_{a\_ref}| \geq |u_{b\_ref}|, |u_{a\_ref}| \geq |u_{c\_ref}|\) | Min: A |
| 6 | \(u_{a\_ref} < 0, u_{b\_ref} > 0, u_{c\_ref} > 0, |u_{c\_ref}| \geq |u_{a\_ref}|, |u_{c\_ref}| \geq |u_{b\_ref}|\) | Max: C |
| 7 | \(u_{a\_ref} < 0, u_{b\_ref} < 0, u_{c\_ref} > 0, |u_{c\_ref}| \geq |u_{a\_ref}|, |u_{c\_ref}| \geq |u_{b\_ref}|\) | Max: C |
| 8 | \(u_{a\_ref} < 0, u_{b\_ref} < 0, u_{c\_ref} > 0, |u_{b\_ref}| \geq |u_{a\_ref}|, |u_{b\_ref}| \geq |u_{c\_ref}|\) | Min: B |
| 9 | \(u_{a\_ref} > 0, u_{b\_ref} < 0, u_{c\_ref} > 0, |u_{b\_ref}| \geq |u_{a\_ref}|, |u_{b\_ref}| \geq |u_{c\_ref}|\) | Min: B |
| 10 | \(u_{a\_ref} > 0, u_{b\_ref} < 0, u_{c\_ref} > 0, |u_{a\_ref}| \geq |u_{b\_ref}|, |u_{a\_ref}| \geq |u_{c\_ref}|\) | Max: A |
| 11 | \(u_{a\_ref} > 0, u_{b\_ref} < 0, u_{c\_ref} > 0, |u_{c\_ref}| \geq |u_{a\_ref}|, |u_{c\_ref}| \geq |u_{b\_ref}|\) | Min: C |
| 12 | \(u_{a\_ref} > 0, u_{b\_ref} < 0, u_{c\_ref} < 0, |u_{b\_ref}| \geq |u_{a\_ref}|, |u_{b\_ref}| \geq |u_{c\_ref}|\) | Min: B |
For DPWM1, which is optimal for unity power factor operation, the zero-sequence component is computed as:
$$ u_z = \begin{cases} 1 – u_{max} & \text{if } |u_{max}| \geq |u_{min}| \\ -1 + u_{min} & \text{if } |u_{max}| < |u_{min}| \end{cases} $$
This results in the phase corresponding to the maximum absolute reference voltage having no switching action around the peak of the current waveform, effectively reducing switching losses. For DPWM3, which offers better loss reduction under non-unity power factor conditions (e.g., during reactive power compensation by solar inverters), the zero-sequence is:
$$ u_z = \begin{cases} 1 – u_{max} & \text{if } |u_{max}| < |u_{min}| \\ -1 + u_{min} & \text{if } |u_{max}| \geq |u_{min}| \end{cases} $$
The generalized implementation allows smooth switching between these modes by simply altering the calculation of \(u_z\) based on the desired modulation type. This eliminates the need for complex vector decomposition and sector-based duty cycle calculations typical of conventional SVPWM, significantly reducing computational burden in digital controllers for solar inverters. The algorithm’s flow can be summarized as:
- Compute the three-phase sinusoidal references \(u_{a\_ref}, u_{b\_ref}, u_{c\_ref}\) from the current controller outputs.
- Determine \(u_{max}\) and \(u_{min}\).
- Select the modulation mode (CPWM/SVPWM, DPWM1, DPWM3) and calculate \(u_z\) using the respective formula.
- Generate the modified references \(u_a^*, u_b^*, u_c^*\) and compare with a triangular carrier to produce gate signals.
To quantify the benefits, Table 2 compares key characteristics of the modulation schemes relevant for solar inverters.
| Modulation Scheme | Zero-Sequence \(u_z\) | Switching Losses | Current THD | Best Use Case |
|---|---|---|---|---|
| CPWM (SVPWM equivalent) | \(-0.5(u_{max} + u_{min})\) | High | Low | High power quality requirements |
| DPWM1 | Eq. (7) | Low (at unity PF) | Moderate | Efficiency-critical solar inverters at unity PF |
| DPWM3 | Eq. (8) | Low (with reactive power) | Moderate | Solar inverters providing grid support services |
The flexibility of this unified approach enables adaptive modulation strategy switching based on operating conditions. For instance, a solar inverter might use CPWM during periods of stringent grid code compliance for lowest THD, and switch to DPWM1 during peak insolation to maximize efficiency. This adaptability is crucial for modern solar inverters that must balance multiple performance objectives.
Simulation and experimental validation were conducted to verify the proposed method’s efficacy. The system parameters are: grid phase voltage 220 V, rated current 30 A, grid frequency 50 Hz, switching frequency 10 kHz, DC-link voltage 600 V, DC capacitance 2200 μF, and filter inductance 5 mH. Simulations in MATLAB/Simulink demonstrate the distinctive gate signal patterns and current waveforms. For equivalent SVPWM, all phases switch continuously, yielding smooth sinusoidal currents with low harmonic content. For DPWM1, the A-phase gate signal shows a 60° interval of no switching around the current peak, while for DPWM3, the non-switching interval is shifted. The three-phase grid currents remain sinusoidal with acceptable THD in all cases, proving that the unified method maintains power quality while reducing losses.
Experimental results from a platform using a TI DSP28377D controller corroborate the simulations. The DC-link voltage is well-regulated, and the AC-side voltages and currents exhibit the expected profiles. The measured current THD for all modulation types remained below 3%, meeting typical grid standards for solar inverters. The ability to dynamically switch modulation modes was also tested successfully, with no discernible transients in the grid current during transitions, highlighting the robustness of the implementation for real-world solar inverter applications.
In conclusion, the unified CPWM and DPWM implementation method based on zero-sequence injection presents a compelling solution for advanced solar inverters. By leveraging simple algebraic calculations for zero-sequence component generation, it achieves the performance benefits of SVPWM and the efficiency advantages of DPWM without complex vector operations. This method facilitates seamless mode switching, allowing solar inverters to adapt to varying operational demands for optimal power quality and efficiency. The simulation and experimental results validate its feasibility and effectiveness. Future work could explore extension to multilevel topologies or integration with model predictive control for next-generation solar inverters. This approach underscores the importance of intelligent modulation strategies in enhancing the value proposition of photovoltaic systems in the global energy landscape.
The mathematical consistency of the method can be further appreciated by analyzing the voltage-second equivalence. The average pole voltage over a switching period \(T_s\) for phase A is:
$$ \langle u_{ao} \rangle = \frac{1}{T_s} \int_0^{T_s} u_{ao} \, dt = \frac{U_{dc}}{2} \cdot d_a $$
where \(d_a\) is the duty cycle. With zero-sequence injection, the duty cycles are derived from the modified references:
$$ d_a = \frac{1}{2} \left(1 + \frac{u_a^*}{U_{dc}/2}\right), \quad d_b = \frac{1}{2} \left(1 + \frac{u_b^*}{U_{dc}/2}\right), \quad d_c = \frac{1}{2} \left(1 + \frac{u_c^*}{U_{dc}/2}\right) $$
Ensuring that the sum of the duty cycles satisfies \(d_a + d_b + d_c = \frac{3}{2} + \frac{u_z}{U_{dc}/2} (u_{a\_ref}+u_{b\_ref}+u_{c\_ref}) = \frac{3}{2}\) since \(u_{a\_ref}+u_{b\_ref}+u_{c\_ref}=0\). This maintains the neutral point balance in split-capacitor configurations often used in solar inverters. The generalized zero-sequence formula ensures that the maximum and minimum duty cycles are clamped to 1 or 0 during specific intervals for DPWM, eliminating switching. For instance, in DPWM1, when \(u_{max}\) is positive and largest, \(u_z = 1 – u_{max}\), so the corresponding modified reference becomes \(u_{max} + (1 – u_{max}) = 1\), leading to a duty cycle of 1 (or 0 for the complementary switch), hence no switching.
In summary, this unified modulation strategy represents a significant step forward for solar inverter technology, combining analytical elegance with practical benefits. Its implementation simplicity makes it highly attractive for digital signal processors in commercial solar inverters, paving the way for more efficient and responsive photovoltaic power systems worldwide.