The rapid proliferation of renewable energy, particularly photovoltaic (PV) systems, has thrust power electronic converters, especially inverters, into a central role within modern energy infrastructure. For residential prosumers equipped with solar panels, the demand for efficient, reliable, and intelligent small-power inverters is steadily growing. Advancements in power electronics and digital control now mandate higher performance standards: operational stability, high conversion efficiency, and critically, high-quality output waveforms characterized by low Total Harmonic Distortion (THD). This article details the comprehensive design and implementation of a versatile, digitally-controlled single-phase grid tied inverter. The core controller is an STM32H7B0VBT6 microcontroller, which orchestrates two distinct operational modes: a grid-forming mode for standalone (off-grid) voltage-programmable output and a grid-feeding mode for grid tied current-programmable operation. The system delivers stable operation and high-fidelity AC waveforms, making it suitable for small-scale residential applications.
1. Overall System Architecture
The proposed single-phase grid tied inverter system is architected around a central digital controller managing several key hardware modules. The primary function is to convert a DC input source (e.g., from PV panels or a battery) into a high-quality AC output that can either power local loads independently or synchronize and feed current into the utility grid. The block diagram illustrates the core data and power flow.
| System Component | Primary Function |
|---|---|
| STM32H7B0VBT6 Controller | System master; generates SPWM signals, processes feedback, executes control algorithms (PID, PLL), and manages user interface. |
| Inverter Power Stage (H-Bridge) | Performs DC-AC conversion using four NMOS transistors switched by SPWM signals. |
| Gate Driver Circuit | Amplifies low-voltage control signals from the MCU to levels sufficient to drive the power MOSFETs reliably. |
| LCL Filter | Attenuates high-frequency switching harmonics from the H-bridge output to produce a smooth sinusoidal voltage/current. |
| Signal Sampling Circuit | Measures output AC voltage and current, scaling and conditioning them for the microcontroller’s ADC. |
| Isolation Transformer | Steps up the inverter’s low-voltage AC output to grid-compatible levels (e.g., 220V AC). |
| Auxiliary Power Supply | Provides regulated low-voltage rails (+5V, +12V, +3.3V) for control circuits, sensors, and displays from the main DC input. |
| User Interface (LCD & Encoders) | Provides real-time data display and allows user input for setting parameters and mode selection. |
The system operates in two fundamental modes:
- Off-Grid (Standalone) Mode: The microcontroller internally generates a pure 50 Hz sinusoidal reference. It produces Sinusoidal Pulse Width Modulation (SPWM) signals to control the H-bridge. The filtered output is a stable AC voltage. A voltage sampling circuit provides feedback, enabling a closed-loop control scheme where the MCU adjusts the SPWM modulation index to maintain the output voltage at a user-programmable setpoint, regardless of load variations.
- Grid-Tied (Synchronization) Mode: The inverter’s output is connected to the utility grid. The microcontroller first uses the sampled grid voltage to perform phase-locking, generating a sinusoidal reference that is perfectly synchronized in frequency and phase with the grid. The control loop then uses feedback from the current sampling circuit. The MCU adjusts the SPWM modulation index to control the amplitude of the current injected into the grid, allowing for programmable real power delivery. This mode is essential for a functional grid tied inverter.
2. Detailed Hardware Design
2.1 Digital Control Core
The brain of the grid tied inverter is the STM32H7B0VBT6 microcontroller. This device features a high-performance Arm® Cortex®-M7 core capable of running at up to 280 MHz. Its key attributes for this application include:
- High Computational Power: Necessary for real-time execution of SPWM generation, software Phase-Locked Loop (PLL) algorithms, Proportional-Integral-Derivative (PID) controllers, and signal processing.
- High-Resolution PWM Timers: The advanced-control timer (TIM1) is configured for center-aligned PWM generation with programmable dead-time insertion, which is crucial for driving the H-bridge safely and efficiently.
- High-Performance ADCs: Multiple 16-bit ADCs are used to sample the analog voltage and current feedback signals with high precision, enabling accurate control and measurement.
- Ample Memory: Sufficient RAM and Flash memory to store complex control firmware and data tables.
2.2 Power Stage and Gate Drive
The inversion is performed by a full-bridge (H-bridge) configuration using four N-channel MOSFETs. This topology allows for the generation of an AC waveform from a DC source. Reliable switching of the high-side MOSFETs requires gate drive voltages referenced to their source terminals, which float at high voltage. This challenge is solved using dedicated gate driver ICs (IR2101). These drivers incorporate a bootstrap circuit to generate the required floating supply for the high-side switch. They accept low-voltage logic signals from the STM32 and deliver high-current, ~12V gate pulses to the MOSFETs, ensuring fast switching and low conduction losses. The dead-time generated by the MCU’s timer prevents simultaneous conduction (shoot-through) of the high-side and low-side switches in the same leg, a critical protection feature.
2.3 Output Filter Design
The output of the H-bridge is a high-frequency SPWM waveform. An LCL low-pass filter is employed to attenuate the switching frequency components and its sidebands, leaving only the fundamental 50 Hz component. The LCL filter, compared to a simple LC filter, offers superior high-frequency harmonic attenuation, which is vital for meeting grid tied inverter standards like IEEE 1547 or IEC 61727. Its design involves a trade-off between attenuation, size, cost, and stability. The component values are selected based on the switching frequency (20 kHz), desired current ripple, and the need to avoid resonance issues within the control bandwidth.
| Filter Component | Role | Design Consideration |
|---|---|---|
| Inverter-side Inductor (L₁) | Limits the high-frequency current ripple from the H-bridge. | Current rating, ripple current specification, core losses. |
| Grid-side Inductor (L₂) | Further smooths the current before connection to the grid/load. | Often smaller than L₁, works with capacitor to form attenuation pole. |
| Filter Capacitor (Cf) | Provides a low-impedance path for switching harmonics. | Capacitance value, voltage rating, and equivalent series resistance (ESR). |
The transfer function of the LCL filter from inverter voltage to grid current is a key element for controller design and stability analysis.
2.4 Sensing and Signal Conditioning
Accurate and isolated measurement of output voltage and current is non-negotiable for a high-performance grid tied inverter. The design uses the following approach:
- Voltage Sensing: A precision voltage transformer (e.g., ZMPT101B) provides galvanic isolation and scales down the high AC voltage to a low-level signal (e.g., 0-1V AC). This signal is then conditioned by an op-amp circuit. A level-shifting stage adds a DC bias (e.g., 1.6V) to the bipolar AC signal, centering it within the 0V to 3.3V input range of the STM32’s ADC. A second amplification stage can adjust the gain. The result is a signal where the 50 Hz sine wave oscillates around 1.6V, perfectly suited for sampling.
- Current Sensing: A current transformer (e.g., ZMCT103C) is placed in series with the output. It provides isolation and outputs a small AC voltage proportional to the current. This signal undergoes identical conditioning through a separate op-amp channel to produce a current-proportional, ADC-compatible signal.
The op-amp circuit requires dual supply rails (e.g., +5V and -5V). A dedicated charge-pump inverter (SGM3204) generates the -5V rail from the main +5V auxiliary supply. A precision voltage reference (MAX6018) provides the stable 1.6V bias. This meticulous design ensures high signal integrity and measurement accuracy, forming the foundation for precise control.
2.5 Auxiliary Systems
Robust auxiliary systems are vital for a complete grid tied inverter product:
- Auxiliary Power Supply: Two DC-DC buck converter modules (MP4560DN) step down the primary DC input voltage (e.g., 50V) to create isolated +12V (for gate drivers) and +5V (for sensors and op-amps) rails. A low-dropout regulator (LDO) further derives a clean +3.3V supply for the microcontroller and logic circuits. The MP4560DN’s high input voltage rating (up to 55V) provides a safe operating margin.
- User Interface: A 1.8″ color LCD with SPI interface displays real-time parameters like output voltage, current, power, setpoints, and operational mode. Two rotary encoders with integrated push-buttons provide an intuitive interface for navigating menus, adjusting setpoints, and changing modes without the need for a complex keypad.
3. Software Architecture and Control Algorithms
The software transforms the hardware into an intelligent, controllable grid tied inverter. Development was initiated using STM32CubeMX for peripheral configuration and code generation, followed by detailed programming in Keil MDK-ARM.
3.1 Peripheral Configuration & Main Program Flow
Key peripherals of the STM32H7B0VBT6 were configured as follows:
| Peripheral | Configuration | Purpose |
|---|---|---|
| GPIO Pins | Configured for encoder input and LCD control lines. | User interaction and display. |
| ADC1 & ADC2 | 16-bit resolution, specific channels for voltage and current. | High-precision sampling of feedback signals. |
| SPI2 | Configured as master for half-duplex communication. | Driving the LCD display. |
| TIM1 (Advanced) | Center-aligned PWM, 20 kHz freq, 2 complementary channels with dead-time. | Generation of the critical SPWM drive signals for the H-bridge. |
| TIM6 (Basic) | Up-counting, 1 kHz frequency interrupt. | Low-priority tasks: encoder scanning, PID calculation updates. |
The main program initializes all hardware, control variables, and the LCD. It then enters an infinite loop that primarily handles the user interface: it polls the state machine for the encoders, updates internal variables (setpoints, mode) based on encoder actions, and refreshes the display with the latest data.
3.2 Core Interrupt Service Routines (ISRs)
3.2.1 High-Frequency Timer (TIM1) ISR @ 20 kHz
This is the most critical timing loop, responsible for real-time control.
- Signal Sampling and Scaling: The raw ADC values for voltage and current are read and converted to actual voltage values. For a 3.3V reference and 16-bit ADC:
$$ V_{real} = \frac{ADC_{sample}}{65535} \times 3.3 $$ - RMS Value Calculation: The software tracks the maximum ($V_{max}$) and minimum ($V_{min}$) of the scaled AC signal over one 50 Hz period (400 samples at 20 kHz). The RMS value of the ADC signal is approximated by:
$$ V_{RMS\_ADC} = \frac{(V_{max} – V_{min})}{2\sqrt{2}} $$
To obtain the true physical RMS value (e.g., in Volts or Amps), a quadratic calibration curve is used, derived from experimental measurements to account for transducer ratios and non-idealities:
$$ V_{RMS\_True} = p_1 \cdot (V_{RMS\_ADC})^2 + p_2 \cdot V_{RMS\_ADC} + p_3 $$
where $p_1$, $p_2$, $p_3$ are fitted coefficients. - Mode-Specific Reference Generation:
- Off-Grid Mode: A pure software-generated 50 Hz sine wave lookup table or direct computation is used.
- Grid-Tied Mode: A Second-Order Generalized Integrator Phase-Locked Loop (SOGI-PLL) algorithm is executed. The SOGI-PLL takes the sampled grid voltage ($v_\alpha$) and generates two orthogonal outputs ($v’_\alpha$, $v’_\beta$) and a precise estimate of the grid angle ($\theta$). The in-phase component $v’_\alpha$ serves as the perfectly synchronized sinusoidal reference. The SOGI dynamics can be represented by:
$$ \dot{v}’_\alpha = \omega \cdot v’_\beta – k \cdot (v_\alpha – v’_\alpha) $$
$$ \dot{v}’_\beta = -\omega \cdot v’_\alpha $$
where $\omega$ is the estimated grid frequency and $k$ is the damping factor.
- SPWM Generation: The sinusoidal reference ($\sin(\theta)$) is multiplied by the modulation index ($m$) and used to update the timer’s compare registers (CCR). For a center-aligned timer with period $ARR$ and dead-time compensation value $D_{comp}$, the CCR values for one half-bridge leg are calculated as:
$$ CCR_1 = \frac{ARR}{2} + \left( \frac{ARR}{2} – D_{comp} \right) \cdot m \cdot \sin(\theta) $$
$$ CCR_2 = \frac{ARR}{2} – \left( \frac{ARR}{2} – D_{comp} \right) \cdot m \cdot \sin(\theta) $$
This generates the required complementary SPWM signals with dead-time.
3.2.2 Low-Frequency Timer (TIM6) ISR
This ISR handles slower, less time-critical tasks.
- Encoder Scanning (200 Hz): Debounces and decodes the rotary encoders, updating flags for the main loop.
- Closed-Loop Control (50 Hz): Executes a discrete-time PID controller. The error ($e[k]$) is the difference between the setpoint and the measured RMS value. The PID output, which directly controls the modulation index ($m$), is calculated as:
$$ m[k] = K_p \cdot e[k] + K_i \cdot T_s \cdot \sum_{i=0}^{k} e[i] + K_d \cdot \frac{(e[k] – e[k-1])}{T_s} $$
where $T_s$ is the sampling period (0.02s for 50 Hz). The integral term is clamped to prevent windup, and the final output $m$ is limited to a safe range (e.g., 0.01 to 0.99). In off-grid mode, the PID regulates voltage; in grid tied inverter mode, it regulates the current amplitude.
4. System Integration and Performance Validation
The integrated grid tied inverter system was tested under both operational modes with a 50V DC input source.
4.1 Off-Grid (Standalone) Mode Test
The voltage setpoint was programmed to 25.2V RMS on the inverter’s low-voltage side. With the step-up transformer connected, the high-voltage output was measured.
| Parameter | Set Value | Measured Value (LV Side) | Measured Value (HV Side) |
|---|---|---|---|
| Output Voltage | 25.2 V RMS | 25.2 V RMS | 220.04 V RMS |
The result confirms accurate voltage regulation and the correct transformer ratio, demonstrating the inverter’s capability as a stable AC voltage source.
4.2 Grid-Tied Mode Test
The inverter was synchronized and connected to the utility grid. The current injection setpoint was programmed to 1.6A RMS.
| Parameter | Set Value | Measured Grid Current |
|---|---|---|
| Injected Current | 1.6 A RMS | 1.611 A RMS |
The close match between setpoint and measured value validates the effectiveness of the SOGI-PLL synchronization and the current-mode PID control loop, confirming the core functionality of a grid tied inverter.
Oscilloscope measurements of the output voltage and current waveforms showed low distortion and clean sinusoidal shapes, indicating effective filtering and control. The user interface successfully displayed all parameters and allowed seamless interaction.
5. Conclusion and Future Perspectives
This project successfully designed and implemented a fully functional, digitally-controlled single-phase grid tied inverter based on the high-performance STM32H7 platform. The system adeptly combines advanced power electronics with sophisticated software algorithms to deliver two key operational modes: a programmable AC voltage source for off-grid applications and a synchronous, programmable current source for grid-connected energy injection. The integration of a responsive user interface with an LCD and encoders enhances practicality. Key achievements include stable operation, high waveform quality, and precise control over output parameters, meeting the foundational requirements for a modern residential inverter.
However, several avenues exist for optimization and future work. The use of a low-frequency (50 Hz) isolation transformer, while providing galvanic isolation and voltage step-up, contributes significantly to the system’s size, weight, and cost, and introduces efficiency losses. Future iterations could explore transformerless topologies with innovative safety mechanisms, or high-frequency isolation using a DC-DC stage followed by a simpler inverter, to improve power density and efficiency. Furthermore, implementing advanced grid-support functions—such as reactive power control (VAr support), low-voltage ride-through (LVRT), and anti-islanding protection per relevant standards—would transform this prototype into a commercially viable and grid-compliant grid tied inverter. Enhancing communication capabilities (e.g., adding Wi-Fi/Bluetooth for remote monitoring and control) would also align with trends in smart energy management systems.