The rapid proliferation of distributed energy resources, primarily interfaced through power electronic converters, has profoundly transformed modern electrical power systems. While enabling the integration of renewable generation, this transition introduces significant challenges to grid stability and power quality. A critical issue arising from this new paradigm is the increasing prevalence of unbalanced grid conditions. These imbalances can originate from asymmetrical faults, uneven distribution of single-phase loads, or inherent asymmetries within the grid infrastructure itself. For a grid connected inverter, which serves as the crucial link between a distributed source and the main utility network, such imbalances are particularly detrimental. They can cause incorrect synchronization, leading to the injection of unbalanced and distorted currents, excessive heating in equipment, protection system malfunctions, and ultimately, a degradation of the overall power quality for all connected users. Therefore, developing advanced control and synchronization strategies that ensure robust and high-quality operation of grid connected inverter systems under unbalanced grid voltages is a paramount research and engineering objective.
The fundamental task of a grid connected inverter is to inject a controlled sinusoidal current that is perfectly synchronized with the grid voltage. This synchronization is universally achieved through a Phase-Locked Loop (PLL). The Synchronous Reference Frame PLL (SRF-PLL) has been the industry standard due to its simplicity and excellent performance under balanced conditions. It operates by transforming the three-phase grid voltages into a two-phase stationary frame (αβ), and then into a synchronous rotating frame (dq) using a estimated angle $\theta$. Under balanced conditions, the q-axis component $v_q$ becomes zero at steady-state, and the angle $\theta$ accurately tracks the grid voltage phase. The transformation from the abc frame to the dq frame is given by the Park transformation:
$$ \begin{bmatrix} v_d \\ v_q \end{bmatrix} = \frac{2}{3} \begin{bmatrix} \cos(\theta) & \cos(\theta – 2\pi/3) & \cos(\theta + 2\pi/3) \\ -\sin(\theta) & -\sin(\theta – 2\pi/3) & -\sin(\theta + 2\pi/3) \end{bmatrix} \begin{bmatrix} v_a \\ v_b \\ v_c \end{bmatrix} $$
However, under unbalanced grid voltages, the SRF-PLL’s performance deteriorates severely. The unbalanced voltages contain both positive-sequence and negative-sequence components. When transformed into the dq frame rotating at the positive-sequence frequency, the negative-sequence component manifests as a sinusoidal oscillation at twice the fundamental frequency (2ω) on both $v_d$ and $v_q$. This oscillation propagates through the PLL’s PI regulator, causing a ripple in the estimated frequency and phase angle, thereby compromising the synchronization accuracy. This erroneous angle directly leads to the generation of non-sinusoidal and unbalanced output currents from the grid connected inverter.
System Modeling of the T-Type Three-Level Grid Connected Inverter
The system under study is a three-phase T-type Neutral Point Clamped (NPC) three-level grid connected inverter. This topology is favored for medium-voltage applications due to its superior output waveform quality and reduced switching losses compared to traditional two-level inverters. The system configuration, as analyzed, includes a DC-link, the three-level inverter bridge, an LCL output filter for harmonic attenuation, and the connection to the unbalanced grid. The control structure employs a cascaded approach: an outer power/current reference generation loop and an inner high-performance current control loop based on H∞ repetitive control.
The LCL filter, composed of inverter-side inductance $L_1$, grid-side inductance $L_2$, and a filter capacitor $C$, is highly effective but introduces a resonant peak that can destabilize the system. A passive damping resistor $R_d$ is connected in series with the capacitor to mitigate this resonance. The state-space model of the LCL filter in the stationary αβ frame can be derived, forming the basis for controller design. The power controller calculates the current references ($i_{d,ref}$, $i_{q,ref}$) in the synchronous dq frame based on the active and reactive power commands ($P_{ref}$, $Q_{ref}$) and the estimated positive-sequence voltage components ($v_d^+$, $v_q^+$):
$$ \begin{bmatrix} P_{ref} \\ Q_{ref} \end{bmatrix} = \frac{3}{2} \begin{bmatrix} v_d^+ & v_q^+ \\ v_q^+ & -v_d^+ \end{bmatrix} \begin{bmatrix} i_{d,ref} \\ i_{q,ref} \end{bmatrix} $$
For unity power factor operation with $Q_{ref}=0$, and assuming accurate synchronization places the voltage vector on the d-axis ($v_q^+ \approx 0$), the reference simplifies to $i_{d,ref} = \frac{2}{3} \frac{P_{ref}}{v_d^+}$ and $i_{q,ref}=0$. The H∞ repetitive controller $G_c(s)$ is designed to provide extremely high gain at the fundamental frequency and its harmonics, ensuring excellent tracking performance and very low total harmonic distortion (THD) in the output current. A representative design, considering the plant model and robustness criteria, yields a controller of the form:
$$ G_c(s) = K_r \frac{Q(s)e^{-sT}}{1 – Q(s)e^{-sT}} G_f(s) $$
where $T$ is the fundamental period, $Q(s)$ is a low-pass filter for stability, $G_f(s)$ is a compensator (often a lead-lag filter), and $K_r$ is a gain. The specific designed controller from the analysis can be represented as a transfer function. The complete system parameters are summarized in the table below.
| Parameter | Symbol | Value | Unit |
|---|---|---|---|
| DC-Link Voltage | $U_{dc}$ | 1750 | V |
| Grid Voltage (Line-to-Neutral RMS) | $U_g$ | 220 | V |
| Inverter-Side Inductance | $L_1$ | 1.0 | mH |
| Grid-Side Inductance | $L_2$ | 0.15 | mH |
| Filter Capacitance | $C$ | 20 | μF |
| Damping Resistance | $R_d$ | 2.0 | Ω |
| Switching / Sampling Frequency | $f_s$ | 10 | kHz |
| Fundamental Frequency | $f_1$ | 50 | Hz |
| Active Power Command | $P_{ref}$ | 10 | kW |
| Reactive Power Command | $Q_{ref}$ | 0 | kVAr |
Design and Analysis of the Improved SOGI-PLL
To address the SRF-PLL’s deficiency under imbalance, a pre-filtering stage based on a Second-Order Generalized Integrator (SOGI) is introduced. The core principle is to extract accurate positive-sequence voltage components from the unbalanced grid voltages before they are processed by the SRF-PLL. The SOGI operates as an adaptive band-pass filter tuned to the fundamental frequency $\omega’$. For a single-phase input $v$, it generates two orthogonal outputs: $v’$ (in-phase) and $qv’$ (quadrature, 90° lagging). Its structure is defined by the following transfer functions:
$$ D(s) = \frac{v’}{v}(s) = \frac{k \omega’ s}{s^2 + k \omega’ s + (\omega’)^2} $$
$$ Q(s) = \frac{qv’}{v}(s) = \frac{k (\omega’)^2}{s^2 + k \omega’ s + (\omega’)^2} $$
Here, $k$ is the damping factor determining the bandwidth. $D(s)$ is a band-pass filter centered at $\omega’$, and $Q(s)$ is a low-pass filter. The gain $k$ presents a trade-off: a smaller $k$ offers better harmonic rejection but slower dynamic response. A value of $k=\sqrt{2}$ is often chosen as a good compromise, providing a bandwidth that adequately attenuates harmonics without excessively slowing down the tracking. For three-phase systems, the SOGI is implemented in the stationary αβ frame. The positive-sequence component extractor is derived using the theory of symmetrical components. In the αβ frame, the voltage vector $\vec{v}_{\alpha\beta}$ can be decomposed as:
$$ \vec{v}_{\alpha\beta} = \vec{v}_{\alpha\beta}^+ + \vec{v}_{\alpha\beta}^- $$
where the superscripts $+$ and $-$ denote positive and negative sequence, respectively. The positive-sequence component can be calculated if both the original signal and its 90° lagging orthogonal counterpart are available:
$$ \vec{v}_{\alpha\beta}^+ = \frac{1}{2} \begin{bmatrix} 1 & -q \\ q & 1 \end{bmatrix} \vec{v}_{\alpha\beta} $$
where the operator $q$ denotes a 90° phase lag ($q = e^{-j\pi/2}$). The standard SOGI-PLL uses SOGI blocks on the α and β components to generate the necessary orthogonal signals for this calculation. However, a practical grid may also contain small DC offsets, which can slowly drift the SOGI outputs and cause steady-state phase errors. The improved SOGI-PLL addresses this by incorporating an additional low-pass filtering stage within the SOGI structure to attenuate the DC component specifically. This modification ensures that the extracted positive-sequence voltage is free from the influence of both negative-sequence harmonics and DC offsets. The block diagram of the complete improved SOGI-PLL is illustrated conceptually below, where $\omega_f$ represents the corner frequency of the DC-blocking filter, typically set equal to the nominal frequency $\omega_1$.
The performance of the filter can be analyzed using Bode plots. For the in-phase transfer function $D(s)$ with $k=\sqrt{2}$ and $\omega’ = 314 \text{ rad/s}$, the magnitude plot shows a characteristic band-pass shape centered at 50 Hz. The phase response goes through zero at the center frequency, which is crucial for zero phase error tracking. The quadrature transfer function $Q(s)$ shows a low-pass characteristic. The addition of the DC-blocking filter significantly attenuates the magnitude at very low frequencies (near 0 Hz) without affecting the response around the fundamental frequency. This enhanced SOGI structure provides the clean positive-sequence voltages $v_{\alpha}^+$ and $v_{\beta}^+$ to the subsequent SRF-PLL, which can then perform accurate and ripple-free phase-locking even under severe unbalanced and DC-offset conditions. This accurate angle $\theta^+$ is finally used for the Park transformations in both the current control loop and the power calculation block of the grid connected inverter.
Simulation Verification and Results
A comprehensive simulation model of the T-type three-level grid connected inverter with the H∞ repetitive current controller and the improved SOGI-PLL was built in MATLAB/Simulink to validate the proposed strategy under various unbalanced grid scenarios. The system parameters from the previous table were used. Two critical and challenging unbalanced fault cases were investigated to demonstrate the efficacy of the synchronization method.
Case 1: Severe Voltage Dip (Unbalance only). The grid is subjected to a severe unbalanced sag at t = 0.2 s. The voltages of phases A and B dip to 50% of the nominal amplitude, while phase C remains at its nominal value. This represents a pure unbalanced condition without DC offset. The performance is evaluated by comparing the inverter’s three-phase output currents before and after the activation of the improved SOGI-PLL. Key performance metrics, specifically the Total Harmonic Distortion (THD) for each phase and the current unbalance factor, are calculated. The THD is defined as:
$$ THD_i(\%) = \frac{\sqrt{\sum_{h=2}^{\infty} I_h^2}}{I_1} \times 100\% $$
where $I_1$ is the RMS value of the fundamental current and $I_h$ is the RMS value of the h-th harmonic.
Case 2: Combined Unbalance and DC Offset. This is a more severe and realistic scenario. Starting at t = 0.2 s, phases A and B dip to 50% of nominal voltage, and simultaneously, a significant DC offset of +60 V is injected into phase A. This condition tests the robustness of the improved SOGI-PLL against both negative-sequence components and DC disturbance, which the standard SOGI-PLL struggles to handle.
| Condition & Case | Synchronization Method | Phase Current THD (%) | Current Unbalance Factor (%) | Remarks | ||
|---|---|---|---|---|---|---|
| Phase A | Phase B | Phase C | ||||
| Case 1: 50% Dip in A & B | Conventional SRF-PLL | 25.7 | 24.1 | 22.5 | High | Highly distorted & unbalanced currents |
| Improved SOGI-PLL | 2.35 | 2.32 | 2.38 | < 1 | Balanced, sinusoidal, low-THD currents | |
| Case 2: Case 1 + 60V DC in A | Conventional SRF-PLL | 35.8 | 28.9 | 26.4 | Very High | Severe distortion and asymmetry |
| Improved SOGI-PLL | 2.78 | 2.71 | 2.82 | < 1 | Maintains balanced, low-THD performance | |
The simulation results are unequivocal. Under Case 1, using a standard PLL with unbalanced voltages leads to grossly distorted and unequal output currents from the grid connected inverter, with THD levels exceeding 25%. This is unacceptable for grid codes. Upon enabling the improved SOGI-PLL, the three-phase currents rapidly become perfectly balanced and sinusoidal, with THD plummeting to well below 3%, demonstrating excellent harmonic suppression and control performance. In Case 2, the performance degradation with a standard PLL is even more pronounced due to the DC offset. However, the improved SOGI-PLL showcases its robustness. It effectively rejects both the negative-sequence component and the DC offset, allowing the H∞ repetitive controller to regulate the grid connected inverter to produce high-quality, balanced output currents with a THD still under 3%. This confirms that the enhanced synchronization strategy is vital for maintaining the required power quality standards during abnormal grid conditions.
Discussion
The integration of the improved SOGI-PLL with the H∞ repetitive controller presents a potent solution for high-performance grid connected inverter applications. The H∞ repetitive controller provides exceptional reference tracking and harmonic compensation at the fundamental frequency and its multiples, which is ideal for achieving ultra-low THD. The improved SOGI-PLL provides the accurate and clean synchronization signal that is a prerequisite for the repetitive controller to function correctly. Without accurate phase information, the repetitive controller’s internal delay line would be misaligned, rendering it ineffective and potentially destabilizing.
The primary advantage of the SOGI-based approach over other sequence separation methods (like dual synchronous reference frame or delayed signal cancellation) is its simplicity in implementation and its inherent filtering capability. The addition of the DC-blocking filter is a crucial yet simple enhancement that addresses a common practical non-ideality. It is important to note that the parameter $k$ in the SOGI involves a fundamental trade-off between dynamic response speed and filtering selectivity. Applications requiring very fast response during grid transients might opt for a larger $k$, while those in highly distorted environments might prefer a smaller $k$. Furthermore, the performance of the overall system is contingent upon the accurate tuning of the H∞ repetitive controller, which must account for the dynamics of the LCL filter and the damping resistor.
A potential limitation of the standard SOGI-PLL structure is its performance under frequency-varying conditions, as it relies on a fixed or slowly-adapted $\omega’$. For grids with significant frequency deviations, an additional Frequency-Locked Loop (FLL) can be integrated to make the SOGI frequency-adaptive, forming an SOGI-FLL structure. This would further enhance the robustness of the grid connected inverter in weak grid scenarios. Future work could explore the integration of such an adaptive mechanism and test the system under a wider range of grid impedance variations and complex fault scenarios.
Conclusion
Ensuring the reliable and high-quality operation of a grid connected inverter under unbalanced grid conditions is a critical challenge for modern power systems. This analysis has demonstrated that the conventional SRF-PLL fails to provide accurate synchronization in such scenarios, leading to the injection of unbalanced and distorted currents. The proposed solution, which integrates an improved Second-Order Generalized Integrator based Phase-Locked Loop (SOGI-PLL) with a high-performance H∞ repetitive current controller, effectively mitigates this issue. The improved SOGI-PLL successfully separates the positive-sequence voltage component while rejecting negative-sequence harmonics and DC offsets. This clean synchronization signal enables the repetitive controller to force the T-type three-level grid connected inverter to inject balanced, sinusoidal currents with very low total harmonic distortion, even during severe unbalanced sags combined with DC offset disturbances. The simulation results validate the effectiveness of this combined control strategy, confirming its potential to enhance the grid-supporting capabilities and power quality compliance of inverter-based resources in increasingly complex and unbalanced electrical networks.