In recent years, the rapid advancement of technology and decreasing costs, coupled with the growing demand for flexibility in modern power systems, have driven the global adoption of distributed photovoltaic (PV) systems. For residential rooftop PV and building-integrated PV applications, these systems require high-efficiency energy harvesting and reliable grid connection under complex lighting conditions, placing core demands on power conversion devices for miniaturization, low loss, and resistance to shadow disturbances. As a key component in distributed PV systems, solar inverters, particularly microinverters, offer advantages such as modular deployment and high reliability, meeting these requirements and demonstrating unique potential in residential PV, commercial distributed PV, and microgrid applications. Among various solar inverter topologies, the quasi-Z-source structure is considered one of the most promising due to its excellent performance.
Traditional voltage-source or current-source solar inverters face theoretical limitations, such as limited voltage gain, high voltage stress on switching devices, and large intrush currents. To address these issues, we propose an enhanced switched-inductor quasi-Z-source solar inverter (ESL-qZSI) based on gallium nitride high electron mobility transistor (GaN HEMT) technology. This novel topology integrates an auxiliary boost unit with a switched-inductor quasi-Z-source network, significantly improving voltage gain at low shoot-through duty ratios while reducing voltage stress on switching components. Additionally, by utilizing GaN HEMT as the power switching device, we design a dedicated negative voltage turn-off driver circuit, increasing the switching frequency from the conventional 10 kHz to 100 kHz. This higher frequency reduces the volume of inductors and other passive components, contributing to a more compact solar inverter design.
The ESL-qZSI topology, as illustrated in the following figure, consists of a DC voltage source input, an auxiliary boost unit, an enhanced switched-inductor boost unit, and a quasi-Z-source unit forming an integrated boost impedance network. This network connects to a rear-stage inverter bridge, followed by a filter that outputs to the load. The solar inverter operates in two primary modes: shoot-through and non-shoot-through states, determined by the switching of the inverter bridge and the alternating conduction or turn-off of diodes D1 to D5.
In the shoot-through state, the upper and lower switch pairs (e.g., S1 and S3, S2 and S4) conduct simultaneously, diodes D1 and D5 turn off, while diodes D2, D3, and D4 conduct. Capacitors C1, C2, and C3 charge inductors L2 and L3 in series, and capacitor C4 charges inductor L4. In the non-shoot-through state, the circuit connects to the AC-side load, diodes D1 and D5 conduct, and diodes D2, D3, and D4 turn off. The voltage source Vin, in series with inductor L1, charges capacitors C1 and C4. The source, along with L1, L2, C2, L3, and L4, supplies power to the load, and inductor L4 charges capacitor C3. Through the single-phase inverter bridge, the quasi-Z-source network provides continuous power to the AC-side load.
To analyze the boost factor B and voltage gain G of the ESL-qZSI solar inverter, we define the DC-link voltage on the inverter bridge as VPN, the voltages across inductors L1, L2, L3, L4 as VL1, VL2, VL3, VL4, and the voltages across capacitors C1, C2, C3, C4 as VC1, VC2, VC3, VC4. The shoot-through duty ratio is D, and the switching period is Ts. Based on the shoot-through state equivalent circuit, the following equations hold:
$$ V_{L1} = V_{in}, \quad V_{L2} = V_{L3} = V_{C2}, $$
$$ V_{L3} = V_{C1} + V_{C3}, \quad V_{L4} = V_{C4}. $$
In this state, the DC-link voltage VPN is 0 V, and the shoot-through time is DTs. For the non-shoot-through state, with a duration of (1-D)Ts, the equations are:
$$ V_{L1} = V_{in} – V_{C1}, $$
$$ V_{L2} + V_{L3} = V_{C1} + V_{C2} – V_{C4}, $$
$$ V_{L2} = V_{L3}, \quad V_{L4} = -V_{C3}, $$
$$ V_{PN} = V_{C3} + V_{C4}. $$
Applying the volt-second balance principle to inductors L1, L2, L3, and L4, we derive:
$$ D V_{in} + (1-D) (V_{in} – V_{C1}) = 0, $$
$$ D V_{C2} + (1-D) \frac{(V_{C1} + V_{C2} – V_{C4})}{2} = 0, $$
$$ D (V_{C1} + V_{C3}) + (1-D) \frac{(V_{C1} + V_{C2} – V_{C4})}{2} = 0, $$
$$ D V_{C4} + (1-D) (-V_{C3}) = 0. $$
Solving these equations, the capacitor voltages relative to the DC source voltage Vin are:
$$ V_{C1} = \frac{1}{1-D} V_{in}, \quad V_{C2} = \frac{1}{1-3D} V_{in}, $$
$$ V_{C3} = \frac{2D}{1 – 4D + 3D^2} V_{in}, \quad V_{C4} = \frac{2}{1-3D} V_{in}. $$
The boost factor B is then:
$$ B = \frac{V_{PN}}{V_{in}} = \frac{2}{1 – 4D + 3D^2}. $$
For performance comparison, we consider other solar inverter topologies such as switched-inductor Z-source solar inverter (SL-ZSI) and switched-inductor-capacitor quasi-Z-source solar inverter (SLC-qZSI). Their boost factors are given by:
$$ B_{SL-ZSI} = \frac{1 + D}{1 – 3D}, \quad B_{SLC-qZSI} = \frac{1}{1 – 4D}, \quad B_{ESL-qZSI} = \frac{2}{1 – 4D + 3D^2}. $$
The relationship between the shoot-through duty ratio D and the modulation index M is D = 1 – M, and the voltage gain G is G = M B. Thus, the voltage gains for each topology are:
$$ G_{SL-ZSI} = \frac{M(2-M)}{3M – 2}, \quad G_{SLC-qZSI} = \frac{M}{4M – 3}, \quad G_{ESL-qZSI} = \frac{2}{3M – 2}. $$
The following table compares the boost factors and voltage gains of these solar inverter topologies at different duty ratios and modulation indices, highlighting the superior performance of the ESL-qZSI solar inverter.
| Topology | Duty Ratio D | Modulation Index M | Boost Factor B | Voltage Gain G |
|---|---|---|---|---|
| SL-ZSI | 0.2 | 0.8 | 3.00 | 2.40 |
| SLC-qZSI | 0.2 | 0.8 | 5.00 | 4.00 |
| ESL-qZSI | 0.2 | 0.8 | 6.25 | 5.00 |
At D = 0.2 and M = 0.8, the ESL-qZSI solar inverter achieves a boost factor of 6.25 and a voltage gain of 5, representing a 108% improvement in boost capability compared to SL-ZSI and a 25% improvement over SLC-qZSI. This demonstrates the theoretical advantage of the ESL-qZSI topology for high-gain solar inverter applications.
We also analyze the voltage stress on switching devices for these solar inverters. The voltage stress Vsw relative to Vin as a function of voltage gain G is derived as:
$$ V_{SW\_SL-ZSI} = \frac{2G}{2 – 3G + \sqrt{9G^2 – 4G + 4}} V_{in}, $$
$$ V_{SW\_SLC-qZSI} = \frac{4G – 1}{3} V_{in}, \quad V_{SW\_ESL-qZSI} = \frac{3G^2}{2G + 2} V_{in}. $$
The following table summarizes the key characteristics of the ESL-qZSI solar inverter topology, including boost factor, voltage gain, and voltage stresses on components.
| Parameter | Expression |
|---|---|
| Boost Factor (B) | $$ \frac{2}{1 – 4D + 3D^2} $$ |
| Voltage Gain (G) | $$ \frac{2}{3M – 2} $$ |
| Switch Voltage Stress (Vsw/Vin) | $$ \frac{3G^2}{2G + 2} $$ |
| C1 Voltage Stress (VC1/Vin) | $$ \frac{1}{1-D} $$ |
| C2 Voltage Stress (VC2/Vin) | $$ \frac{1}{1-3D} $$ |
| C3 Voltage Stress (VC3/Vin) | $$ \frac{2D}{1 – 4D + 3D^2} $$ |
| C4 Voltage Stress (VC4/Vin) | $$ \frac{2}{1-3D} $$ |
| D1/D2 Voltage Stress (VD/Vin) | $$ \frac{2}{1 – 4D + 3D^2} $$ |
| D3/D4/D5 Voltage Stress (VD/Vin) | $$ \frac{1-D}{1 – 4D + 3D^2} $$ |
The ESL-qZSI solar inverter exhibits the lowest switch voltage stress among compared topologies, reducing thermal losses and enhancing reliability in practical applications. For device selection, we choose the Infineon CoolGaN series IGOT60R070D1 GaN HEMT, which offers a 600 V breakdown voltage, maximum continuous drain current of 31 A, and on-resistance of 70 mΩ. Compared to silicon-based devices, this GaN HEMT enables higher switching speeds, lower switching losses, smaller size, and better high-temperature performance, making it ideal for high-frequency solar inverters.
To address challenges such as electromagnetic interference and parasitic effects in GaN HEMT-based solar inverters, we design a half-buck negative voltage turn-off driver circuit using the Infineon 1EDF5673K driver chip. Key parameters of the driver circuit are optimized for stability and response speed, as shown in the following table.
| Parameter | Value |
|---|---|
| R7 (Ω) | 470 |
| R5 (Ω) | 10 |
| R4 (Ω) | 3.3 |
| C6 (nF) | 3 |
| C3 (nF) | 100 |
| C4 (nF) | 1 |
This driver circuit minimizes loop inductance by compact layout of GaN HEMT, driver chip, and decoupling capacitors, and uses differential pair routing to reduce parasitic effects. The negative turn-off voltage suppresses Miller capacitance-induced parasitic conduction, ensuring reliable operation at 100 kHz switching frequency.
For simulation and experimental validation, we model the ESL-qZSI solar inverter in MATLAB/Simulink with system parameters listed in the following table.
| Parameter | Value |
|---|---|
| Input Voltage (Vin) | 64 V |
| Switching Frequency | 100 kHz |
| Quasi-Z-Source Capacitor | 100 μF |
| Quasi-Z-Source Inductor | 0.5 mH |
| LC Filter Capacitor | 20 μF |
| LC Filter Inductor | 1 mH |
| Shoot-Through Duty Ratio (D) | 0.2 |
| Base Frequency | 50 Hz |
The control method employs a single-phase space vector pulse width modulation (SVPWM) algorithm, which reduces switching losses under the same switching frequency. Simulation results show a DC-link voltage of 380 V, corresponding to a boost factor B of 5.94. The filtered output sinusoidal voltage has a peak value of 294 V, yielding a voltage gain G of approximately 4.59, with a total harmonic distortion (THD) of 1.69%. Capacitor voltage stresses in simulation stabilize after 0.05 s, with VC4 around 300 V, VC1 and VC3 around 80 V, and VC2 around 150 V, consistent with theoretical calculations.
We build a prototype solar inverter system with a TMS320F28335 DSP controller, load, DC power supply, and oscilloscope. The driver circuit is tested with a 100 kHz PWM signal, and the input signal waveform at the driver chip is measured, showing a stable PWM output of 3.4 V. Experimental results for the DC-link voltage indicate a steady value of 368 V, giving an actual boost factor B of 5.75. The output voltage waveform is sinusoidal with a peak of 272 V, RMS value of 188 V, frequency of 50 Hz, and output power of 180 W. The efficiency of the solar inverter is measured at 90.5%. FFT analysis of the output voltage reveals a THD of 2.57%, meeting grid-connection standards.
The following table compares typical results of SL-ZSI, SLC-qZSI, and ESL-qZSI solar inverters, underscoring the performance improvements of the proposed topology.
| Parameter | SL-ZSI | SLC-qZSI | ESL-qZSI |
|---|---|---|---|
| Input Voltage Vin (V) | 36 | 80 | 64 |
| Shoot-Through Duty Ratio D | 0.3 | 0.206 | 0.2 |
| Modulation Index M | 0.7 | 0.794 | 0.8 |
| Boost Factor B | 13 | 5 | 5.75 |
| Switching Frequency (kHz) | 10 | 13.3 | 100 |
| Efficiency (%) | – | 88.5 | 90.5 |
At D ≈ 0.2, the ESL-qZSI solar inverter achieves a 15% higher boost factor compared to SLC-qZSI and a 91% improvement over SL-ZSI theoretical calculations. The higher efficiency of 90.5% versus 88.5% for SLC-qZSI demonstrates the advantage of the proposed solar inverter in practical applications. The use of GaN HEMT enables a switching frequency of 100 kHz, reducing passive component sizes and losses.
In conclusion, we have developed a high-gain solar inverter based on GaN HEMT technology with an enhanced switched-inductor quasi-Z-source topology. Theoretical analysis, simulation, and experimental results validate its effectiveness in addressing low voltage gain and high voltage stress issues in traditional solar inverters. The integration of GaN HEMT increases the switching frequency to 100 kHz, lowering power losses and enabling miniaturization of filter components. This solar inverter solution is suitable for high-gain requirements in distributed PV systems, such as home microgrids and outdoor distributed generation, offering an efficient and reliable technical option for future solar energy applications.