With the rapid development of the global economy, the demand for energy continues to rise. Solar energy, as a clean and renewable resource, offers advantages such as low pollution, abundant reserves, and ease of harvesting, making it widely adopted. Distributed photovoltaic (PV) systems, which rely on solar inverters as core components for energy conversion and power quality control, play a crucial role in grid-connected systems. The performance of these solar inverters directly impacts the overall power quality. Non-isolated grid-connected solar inverters are particularly popular due to their simple structure, compact size, and lightweight design. However, in such systems, the direct electrical connection between PV panels and the grid, combined with the significant parasitic capacitance between the panels and the ground, creates a common-mode loop. When high-frequency common-mode voltage (CMV) excites this parasitic capacitance, it generates substantial leakage current. This leakage current severely degrades the output power quality of PV grid-connected systems and poses risks to personal safety.
To address this issue, researchers have focused on inverter topologies, modulation techniques, and control strategies. While some studies propose novel inverter topologies to mitigate leakage current, these approaches often introduce additional components, increasing costs and losses. Others explore modulation methods, but these are typically limited to specific topologies. Control strategies, such as virtual impedance techniques, offer broader applicability without hardware modifications. In this context, we propose a centralized leakage current suppression strategy for multiple solar inverters based on carrier phase-shift control and simulated annealing algorithm optimization. This approach does not require extra hardware, reduces costs, and is widely applicable.
In non-isolated three-phase PV grid-connected systems, the parasitic capacitance between PV panels and the ground leads to common-mode voltage. This voltage, applied across the parasitic capacitance in the common-mode loop, results in leakage current. Since the grid voltage is a low-frequency signal (e.g., 50 Hz), its impact on leakage current is negligible, allowing the grid side to be equivalently short-circuited. The structure of a non-isolated three-phase PV grid-connected system includes PV modules, a DC/AC inverter, an LCL filter, and the grid. Key components include PV units, switching transistors (e.g., Qk where k = 1 to 6), DC-link capacitor (Cdc), inverter-side filter inductor (L1), grid-side filter inductor (Lg), filter capacitor (Cf), grid voltage (eg), and PV panel parasitic capacitance (Cpv).
The common-mode equivalent model for leakage current in a solar inverter illustrates the relationship between common-mode voltage and leakage current. The common-mode voltage v_com for a three-phase solar inverter is expressed as:
$$ v_{com} = \frac{v_{AO} + v_{BO} + v_{CO}}{3} $$
where v_AO, v_BO, and v_CO are the voltages from inverter output points A, B, and C to the virtual neutral point O on the DC side. The leakage current i_leakage flowing through the parasitic capacitance is derived using nodal voltage analysis and superposition theorem. For a single solar inverter, the leakage current is given by:
$$ i_{leakage} = K \left( v_{AO} + v_{BO} + v_{CO} \right) $$
where K is a parameter dependent on the system’s passive components, defined as:
$$ K = \frac{j\omega C_{pv}}{3(P_6 P_7 P_8 P_9)} $$
Here, P6 to P9 are functions of the filter components and parasitic capacitance:
$$ P_6 = \omega^2 C_f L_g, \quad P_7 = \omega^2 C_{pv} L_g, \quad P_8 = \omega^2 C_{pv} L_1, \quad P_9 = \omega^4 C_{pv} C_f L_1 L_g $$
For multiple solar inverters, assuming identical parameters and DC voltage, the total leakage current i_lea_sum1 for a inverters is:
$$ i_{lea\_sum1} = K \sum_{a} \left( \frac{4M_r V_{dc}}{3} \sin(\omega_0 t) + \sum_{m,n} A_{mn} \cos(m \omega_{sw} t + n \omega_0 t) \right) $$
where M_r is the modulation index, ω_sw is the carrier angular frequency, ω_0 is the modulation angular frequency, V_dc is the DC voltage, and A_mn is the harmonic amplitude derived from Bessel functions.
To suppress leakage current in multiple solar inverters, we propose a carrier phase-shift control strategy. For a system with a solar inverters, the carrier phases are initialized as follows: the first solar inverter’s carrier phase remains unchanged, the second is shifted by 2π(1/a), the third by 2π(2/a), and so on, up to the a-th solar inverter shifted by 2π((a-1)/a). This initialization reduces the harmonic components in the total leakage current. After applying carrier phase-shift, the total leakage current i_lea_sum2 becomes:
$$ i_{lea\_sum2} = K \sum_{a} \left( \frac{4a M_r V_{dc}}{3} \sin(\omega_0 t) + \sum_{m=ka,n} a A_{mn} \cos(m \omega_{sw} t + n \omega_0 t) \right) $$
where k = 1,2,…, indicating that only harmonics where m is a multiple of a remain, leading to cancellation of other harmonics and reduced leakage current amplitude.
In practical scenarios, solar inverters may have different DC voltages or power ratings, causing variations in leakage current amplitudes. To address this, we employ a simulated annealing algorithm to optimize the carrier phases. The algorithm initializes parameters such as initial temperature, termination temperature, cooling rate, and iteration count. It generates random carrier phase adjustments within [0, 2π], computes the total leakage current, and uses the Metropolis criterion to accept or reject adjustments based on the probability:
$$ p = \begin{cases} 1, & \text{if } \Delta i \leq 0 \\ \exp\left(-\frac{\Delta i}{T}\right), & \text{otherwise} \end{cases} $$
where Δi is the change in leakage current and T is the current temperature. The goal is to minimize the total leakage current below a predefined threshold η.
We validated the proposed strategy through simulations in MATLAB/Simulink. The system parameters are summarized in the table below:
| Parameter | Value |
|---|---|
| Grid Voltage eg (V) | 380 |
| Inverter-side Inductor L1 (mH) | 1.5 |
| Grid-side Inductor Lg (mH) | 1.2 |
| Filter Capacitor Cf (μF) | 9.4 |
| Switching Frequency fs (kHz) | 5 |
| Parasitic Capacitance Cpv (nF) | 1 |
For three solar inverters with identical DC voltages (1000 V), carrier phases were initialized at 0°, 120°, and 240°. After applying carrier phase-shift control, the total leakage current amplitude decreased by 0.9 A, and the RMS value reduced by approximately 0.4 A to 0.28 A. The grid current total harmonic distortion (THD) improved from 2.61% to 1.03%, demonstrating enhanced power quality.
For solar inverters with different DC voltages (1000 V, 800 V, 600 V), the simulated annealing algorithm optimized carrier phases to 173.07°, 303.78°, and 51.72°. After optimization, the total leakage current RMS value decreased by 0.02 A to 0.19 A, and the grid current THD reduced from 1.49% to 1.37%. These results confirm the effectiveness of the optimization strategy in real-world conditions with varying solar inverter parameters.
In conclusion, the proposed centralized leakage current suppression strategy for multiple solar inverters, combining carrier phase-shift control and simulated annealing algorithm, effectively reduces leakage current without additional hardware. This approach lowers costs, improves safety, and enhances power quality in PV grid-connected systems. The strategy is scalable and applicable to various solar inverter configurations, making it a practical solution for modern solar energy systems.