Transient Overvoltage Analysis and Suppression in Grid-Following Solar Inverter During Fault Recovery

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Introduction

The rapid integration of solar inverter into modern power systems has introduced significant challenges in maintaining grid stability, particularly during fault recovery. Grid-following solar inverter, which synchronize with grid voltage through phase-locked loops (PLLs), are prone to transient overvoltage at the point of common coupling (PCC) when transitioning from low-voltage ride-through (LVRT) mode to normal operation. This overvoltage arises from improper reactive/power current responses, delayed PLL dynamics, and abrupt current reference switching. Existing studies primarily focus on optimizing inverter parameters or improving PLL dynamics but often overlook the transient effects of mode-switching and current-loop interactions. This paper addresses these gaps by proposing a current recovery optimization strategy to suppress overvoltage, validated through simulations and experiments.

Mechanism of Transient Overvoltage in Solar Inverter

Dynamic Modeling of Grid-Following Solar Inverter

A three-phase grid-tied solar inverter comprises a DC-link, inverter bridge, LC filter, and control loops (Figure 1). The control structure includes:

  • DC voltage outer loop: Provides active current reference id_refid_ref​.
  • Current inner loop: Uses PI controllers to track dd-qq axis current references.
  • PLL: Synchronizes the inverter with the grid voltage phase.

The state-space model of the inverter considers 12 variables, including PLL dynamics, current control delays, and grid impedance effects. Key equations include:

Grid-side dynamics in dd-qq frame:{Lgdiddt=ud−Uscos⁡δ+(ω0+Δω)Lgiq−Rgid,Lgdiqdt=uq+Ussin⁡δ−(ω0+Δω)Lgid−Rgiq.{Lg​dtdid​​=ud​−Us​cosδ+(ω0​+Δω)Lg​iq​−Rg​id​,Lg​dtdiq​​=uq​+Us​sinδ−(ω0​+Δω)Lg​id​−Rg​iq​.​

PLL dynamics:{δ˙=Δω,Δω=kp_plluq+ki_pll∫uq dt.{δ˙=Δω,Δω=kp_pll​uq​+ki_pll​∫uq​dt.​

Current control loop:{uod=kp_acc(id_ref−id)+ki_acc∫(id_ref−id) dt−ω0Lfiq+kcvrfud,uoq=kp_acc(iq_ref−iq)+ki_acc∫(iq_ref−iq) dt+ω0Lfid+kcvrfuq.{uod​=kp_acc​(id_ref​−id​)+ki_acc​∫(id_ref​−id​)dt−ω0​Lf​iq​+kcvrf​ud​,uoq​=kp_acc​(iq_ref​−iq​)+ki_acc​∫(iq_ref​−iq​)dt+ω0​Lf​id​+kcvrf​uq​.​

Causes of Overvoltage

  1. Unreleased Reactive Power: During LVRT, solar inverter inject reactive current to support PCC voltage. If reactive current is not withdrawn promptly post-fault, excess reactive power raises UPCCUPCC​.
  2. Abrupt Current Reference Switching: Direct mode transitions cause step changes in id_refid_ref​ and iq_refiq_ref​, triggering PI controller saturation and distorted modulation waves.

Proposed Overvoltage Suppression Strategy

Optimized Current Recovery Profiles

To mitigate abrupt reference changes, we introduce an LVRT recovery mode with gradual current reference adjustments. Three recovery functions are evaluated:

  1. Linear Ramp:

iref(t)=k1(t−t0)+I0.iref​(t)=k1​(t−t0​)+I0​.

  1. Exponential Curve:

iref(t)=ek2(t−t0)−1+I0.iref​(t)=ek2​(t−t0​)−1+I0​.

  1. Sigmoid Upper Half:

iref(t)=2N1+e−k3(t−t0)−N+I0.iref​(t)=1+e−k3​(t−t0​)2N​−N+I0​.

Time Constant Constraints

The recovery time constants TreqTreq​ (reactive) and TradTrad​ (active) must satisfy:0<Treq<τ1<Trad,0<Treq​<τ1​<Trad​,

where τ1τ1​ and τ2τ2​ are current response time constants derived from:τ1,2=2kp_acc/Lf±(kp_acc/Lf)2−4ki_acc/Lf.τ1,2​=kp_acc​/Lf​±(kp_acc​/Lf​)2−4ki_acc​/Lf​​2​.

Simulation and Experimental Validation

System Parameters

Key parameters of the solar inverter system are summarized in Table 1.

ParameterSymbolValue
Rated PowerPratedPrated​700 W
Grid Voltage (RMS)UgUg​55 V
DC-Link VoltageUdcUdc​175 V
LC FilterLf,CfLf​,Cf​1.135 mH, 10 μF
Current Loop PI Gainskp_acc,ki_acckp_acc​,ki_acc​8.1, 600
PLL PI Gainskp_pll,ki_pllkp_pll​,ki_pll​1.9, 200

Simulation Results

  1. Without Suppression: PCC voltage exceeds 1.2 pu due to modulation wave saturation (Figure 2a).
  2. With Suppression: Linear ramp recovery reduces overvoltage to 1.05 pu (Figure 2b).
  3. Recovery Function Comparison: All three profiles show comparable suppression, but sigmoid curves minimize oscillations.

Experimental Results

A 700 W solar inverter prototype was tested under grid voltage sag (0.4 pu → 1.0 pu). Key findings:

  • Uncontrolled Case: PCC voltage peaks at 1.18 pu with current overshoot (Figure 3a).
  • Controlled Case: Voltage stabilizes at 1.03 pu using linear ramps (Figure 3b).
  • Violated Time Constants: Faster active recovery (Trad<τ1Trad​<τ1​) worsens overvoltage (Figure 4a), while slow reactive recovery prolongs oscillations (Figure 4b).

Conclusion

  1. Mechanism Clarified: Transient overvoltage in solar inverter stems from delayed reactive power withdrawal and abrupt current reference switching.
  2. Model Accuracy: The 12th-order state-space model effectively captures transient dynamics, aligning with simulation/experimental results.
  3. Strategy Effectiveness: Optimized current recovery profiles suppress overvoltage by 15–20%, ensuring stable mode transitions.

Future work will extend this strategy to asymmetric grid faults and hybrid renewable systems.

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